From patchwork Tue Feb 23 14:15:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 62703 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp1853927lbl; Tue, 23 Feb 2016 06:15:18 -0800 (PST) X-Received: by 10.66.154.233 with SMTP id vr9mr46584624pab.66.1456236918187; Tue, 23 Feb 2016 06:15:18 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 133si47677700pfa.203.2016.02.23.06.15.17; Tue, 23 Feb 2016 06:15:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753627AbcBWOPM (ORCPT + 30 others); Tue, 23 Feb 2016 09:15:12 -0500 Received: from mail-wm0-f45.google.com ([74.125.82.45]:35865 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753570AbcBWOPG (ORCPT ); Tue, 23 Feb 2016 09:15:06 -0500 Received: by mail-wm0-f45.google.com with SMTP id g62so224303903wme.1 for ; Tue, 23 Feb 2016 06:15:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/onJErwqazAiJoYeDjVzj1nOZlKTUrfyhlc7uWPZmYE=; b=GUtjiO49aGkObNU//KzdIEcYhAALrevx/hhFs6CfRn2PHqDXVDl6NgpNAsW9alQTbO 6b4VkyksajUn8WbxaciMmlwnsA2zHK0NHwaPklngzVe/0qwtROg4ZOFnAd0EwaY5qZZn seXOKmdFKV9JsO6A1Rm6szuXTi0wilrfnVo18= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/onJErwqazAiJoYeDjVzj1nOZlKTUrfyhlc7uWPZmYE=; b=J8bffposrH0YIIemLBklavK2e3TcKxWfqYn2JyEZLF6Id2HBMJavq2JW1zYiqw2tD+ PSR/EJKo/MjKHwaLMaCa+QDJCZGj8K9id6knSuJvSvONPPnKyMGDZn/OfFeSMAX/Rq3A IuHnaxPn9o0xHCtMctGtcSi9GcaiNAOdFIFWSpOMn+uEa6hWHW+Yds1o90J6iezX/SGr yDbFDkFiqVSkDJIugQzUSCA1F/KvAFQ/NcWb8/v5t1FMl/YL7OsH72xwdjriIWW+4h+E shFQiPjFpW+Fl1vf6NU83yTUcw6QnihlUucI3p0xGEEATdMq+Bb0xR0R4Hh7eHAoULPR vvEw== X-Gm-Message-State: AG10YOSrdUG1LvZtaS6aHKNXRDaYy3O54auzQYw36D6plEGK+PZ7LQVICh2Xo6tmoxYiDmWX X-Received: by 10.194.58.47 with SMTP id n15mr34277266wjq.155.1456236905695; Tue, 23 Feb 2016 06:15:05 -0800 (PST) Received: from localhost.localdomain (host-92-17-247-99.as13285.net. [92.17.247.99]) by smtp.gmail.com with ESMTPSA id av3sm29965752wjc.44.2016.02.23.06.15.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Feb 2016 06:15:05 -0800 (PST) From: Srinivas Kandagatla To: Andy Gross , linux-arm-msm@vger.kernel.org Cc: Rob Herring , Russell King , linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 11/12] ARM: dts: apq8064: add i2c6 device node. Date: Tue, 23 Feb 2016 14:15:03 +0000 Message-Id: <1456236903-2878-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456236639-1379-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1456236639-1379-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds i2c6 device node and pinctrls required for IFC6410 on MIPI-CSI connector. Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 25 +++++++++++++++++++++++++ arch/arm/boot/dts/qcom-apq8064.dtsi | 11 +++++++++++ 2 files changed, 36 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi index 0cb22cf..b57c59d 100644 --- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi @@ -153,6 +153,31 @@ }; }; + i2c6_pins: i2c6 { + mux { + pins = "gpio16", "gpio17"; + function = "gsbi6"; + }; + + pinconf { + pins = "gpio16", "gpio17"; + drive-strength = <16>; + bias-disable; + }; + }; + + i2c6_pins_sleep: i2c6_pins_sleep { + mux { + pins = "gpio16", "gpio17"; + function = "gpio"; + }; + pinconf { + pins = "gpio16", "gpio17"; + drive-strength = <2>; + bias-disable = <0>; + }; + }; + gsbi6_uart_2pins: gsbi6_uart_2pins { mux { pins = "gpio14", "gpio15"; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 445297c..5540b34 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -365,6 +365,17 @@ clock-names = "core", "iface"; status = "disabled"; }; + + gsbi6_i2c: i2c@16580000 { + compatible = "qcom,i2c-qup-v1.1.1"; + pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>; + pinctrl-names = "default", "sleep"; + reg = <0x16580000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI6_QUP_CLK>, + <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + }; }; gsbi7: gsbi@16600000 {