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[110.170.137.253]) by smtp.gmail.com with ESMTPSA id e6sm8034986pfj.71.2016.03.10.16.09.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 10 Mar 2016 16:09:33 -0800 (PST) From: Guodong Xu To: catalin.marinas@arm.com, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, treding@nvidia.com, kuninori.morimoto.gx@renesas.com, alim.akhtar@samsung.com, srinivas.kandagatla@linaro.org, xuwei5@hisilicon.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Guodong Xu Subject: [PATCH v2 1/3] arm64: defconfig: Enable devices for Hi6220 and 96boards HiKey Date: Fri, 11 Mar 2016 07:09:09 +0700 Message-Id: <1457654951-29944-2-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1457654951-29944-1-git-send-email-guodong.xu@linaro.org> References: <1457654951-29944-1-git-send-email-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch enables a number of devices currently supported by the Hi6220 and 96boards HiKey. These include a) Hi655x PMIC and regulator b) Hi6220 I2C, USB, MMC, mailbox, and reset c) CONFIG_PINCTRL_SINGLE, and CONFIG_LEDS_GPIO v2: - rebase to next-20160310, CONFIG_MMC_BLOCK_MINORS=16 is already in. - set CONFIG_I2C_DESIGNWARE_PLATFORM to be build as module Signed-off-by: Guodong Xu Reviewed-by: Arnd Bergmann --- arch/arm64/configs/defconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 1.9.1 diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0f51943..dbd6694 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -146,6 +146,7 @@ CONFIG_VIRTIO_CONSOLE=y # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y +CONFIG_I2C_DESIGNWARE_PLATFORM=m CONFIG_I2C_MV64XXX=y CONFIG_I2C_QUP=y CONFIG_I2C_UNIPHIER_F=y @@ -154,6 +155,7 @@ CONFIG_SPI=y CONFIG_SPI_PL022=y CONFIG_SPI_QUP=y CONFIG_SPMI=y +CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_MSM8916=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y CONFIG_GPIO_SYSFS=y @@ -169,8 +171,10 @@ CONFIG_THERMAL_EMULATION=y CONFIG_EXYNOS_THERMAL=y CONFIG_MFD_SPMI_PMIC=y CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_HI655X_PMIC=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_QCOM_SMD_RPM=y CONFIG_REGULATOR_QCOM_SPMI=y CONFIG_REGULATOR_S2MPS11=y @@ -195,6 +199,7 @@ CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y +CONFIG_USB_DWC2=y CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y @@ -212,9 +217,11 @@ CONFIG_MMC_SPI=y CONFIG_MMC_SUNXI=y CONFIG_MMC_DW=y CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_K3=y CONFIG_MMC_BLOCK_MINORS=16 CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y CONFIG_LEDS_SYSCON=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y @@ -241,6 +248,8 @@ CONFIG_COMMON_CLK_QCOM=y CONFIG_MSM_GCC_8916=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_SMMU=y +CONFIG_MAILBOX=y +CONFIG_HI6220_MBOX=y CONFIG_QCOM_SMEM=y CONFIG_QCOM_SMD=y CONFIG_QCOM_SMD_RPM=y @@ -249,6 +258,8 @@ CONFIG_ARCH_TEGRA_210_SOC=y CONFIG_HISILICON_IRQ_MBIGEN=y CONFIG_EXTCON_USB_GPIO=y CONFIG_PHY_RCAR_GEN3_USB2=y +CONFIG_COMMON_RESET_HI6220=y +CONFIG_PHY_HI6220_USB=y CONFIG_PHY_XGENE=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y