From patchwork Fri Apr 22 17:14:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 66486 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp841095qge; Fri, 22 Apr 2016 10:19:11 -0700 (PDT) X-Received: by 10.66.199.66 with SMTP id ji2mr30192850pac.34.1461345551503; Fri, 22 Apr 2016 10:19:11 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q5si8616897pai.104.2016.04.22.10.18.41; Fri, 22 Apr 2016 10:19:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932573AbcDVRSj (ORCPT + 29 others); Fri, 22 Apr 2016 13:18:39 -0400 Received: from mail-io0-f175.google.com ([209.85.223.175]:34241 "EHLO mail-io0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932298AbcDVROY (ORCPT ); Fri, 22 Apr 2016 13:14:24 -0400 Received: by mail-io0-f175.google.com with SMTP id 2so125522275ioy.1 for ; Fri, 22 Apr 2016 10:14:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6Sw3wSiPCTgN/9/sxKu6nW4J9N3FT81nE9Pqv6HKigY=; b=Gkol+cN/MgKpkWyyDQchTomzQv6rs5BIecdA20QvkLW1GU5P6bcRi5DMm1pCon7Vhb YEjX5D8m/+xXluLnNvErmwSVki+zTyWiyK4cZmMPpzNydLHlt5WUBd4Anelu+YEpt2aG ITJLLxAcgMruje7Qg+RjUDtY5eZt562Nn1xHM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6Sw3wSiPCTgN/9/sxKu6nW4J9N3FT81nE9Pqv6HKigY=; b=jcn/qXlPt0EDtMg2THfnrek1MNfDIy3MODC3QitlGRlvK0or6BjLkd4ChNFwQJtlEO 0d6yN+C9HdiLP99Azihn0GTKGGTZsUZZtG27c9RLjM5eCt40oAg7vafqWvxtM8T2NAHe wXtCJ7a6erVjHqU5gF/2P6eAZQvmUjcDrlHnpMZ+jFPiOXzZyubGJYbJnCndNP0FvGKS drzvMAJIhKlv7gcsoYUTUGGVbgsJoWr3GqMhy6YfOMDm37mbLJcUXtkDk6Ki7DGZoFV0 PZtAh4TuC8ibcfGlsaNdVke56OymClW0wSYcbvup7ZmO/PhmrziAjxNiXt7ov0Gr8S4q dIYw== X-Gm-Message-State: AOPr4FWA0meeK2zFkMt6X6eo1pV/1byW9k6GUPSi/52wgaplyfSo3ATJWwwH9/pMB9E8xvsK X-Received: by 10.107.154.18 with SMTP id c18mr26905417ioe.169.1461345263056; Fri, 22 Apr 2016 10:14:23 -0700 (PDT) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id vg8sm1975886igb.15.2016.04.22.10.14.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Apr 2016 10:14:22 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, Suzuki.Poulose@arm.com Cc: linux-kernel@vger.kernel.org Subject: [PATCH V3 03/18] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Date: Fri, 22 Apr 2016 11:14:00 -0600 Message-Id: <1461345255-11758-4-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1461345255-11758-1-git-send-email-mathieu.poirier@linaro.org> References: <1461345255-11758-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In their current implementation the tmc_read_prepare/unprepare() are a lump of if/else that is difficult to read. This patch is alleviating that by using a switch statement. The latter also allows for a better control on the error path. Signed-off-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-tmc.c | 56 ++++++++++++++++++----------- 1 file changed, 36 insertions(+), 20 deletions(-) -- 2.5.0 diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 66fa7736d12f..d211aeec49f8 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -431,7 +431,7 @@ static const struct coresight_ops tmc_etf_cs_ops = { static int tmc_read_prepare(struct tmc_drvdata *drvdata) { - int ret; + int ret = 0; unsigned long flags; enum tmc_mode mode; @@ -439,25 +439,31 @@ static int tmc_read_prepare(struct tmc_drvdata *drvdata) if (!drvdata->enable) goto out; - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + switch (drvdata->config_type) { + case TMC_CONFIG_TYPE_ETB: tmc_etb_disable_hw(drvdata); - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - tmc_etr_disable_hw(drvdata); - } else { + break; + case TMC_CONFIG_TYPE_ETF: + /* There is no point in reading a TMC in HW FIFO mode */ mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode == TMC_MODE_CIRCULAR_BUFFER) { - tmc_etb_disable_hw(drvdata); - } else { - ret = -ENODEV; + if (mode != TMC_MODE_CIRCULAR_BUFFER) { + ret = -EINVAL; goto err; } + + tmc_etb_disable_hw(drvdata); + break; + case TMC_CONFIG_TYPE_ETR: + tmc_etr_disable_hw(drvdata); + break; + default: + ret = -EINVAL; + goto err; } + out: drvdata->reading = true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "TMC read start\n"); - return 0; err: spin_unlock_irqrestore(&drvdata->spinlock, flags); return ret; @@ -472,20 +478,30 @@ static void tmc_read_unprepare(struct tmc_drvdata *drvdata) if (!drvdata->enable) goto out; - if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) { + switch (drvdata->config_type) { + case TMC_CONFIG_TYPE_ETB: tmc_etb_enable_hw(drvdata); - } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { - tmc_etr_enable_hw(drvdata); - } else { + break; + case TMC_CONFIG_TYPE_ETF: + /* Make sure we don't re-enable a TMC in HW FIFO mode */ mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode == TMC_MODE_CIRCULAR_BUFFER) - tmc_etb_enable_hw(drvdata); + if (mode != TMC_MODE_CIRCULAR_BUFFER) + goto err; + + tmc_etb_enable_hw(drvdata); + break; + case TMC_CONFIG_TYPE_ETR: + tmc_etr_disable_hw(drvdata); + break; + default: + goto err; } + out: drvdata->reading = false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_info(drvdata->dev, "TMC read end\n"); +err: + spin_unlock_irqrestore(&drvdata->spinlock, flags); } static int tmc_open(struct inode *inode, struct file *file)