From patchwork Fri Apr 22 22:17:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 66503 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp962410qge; Fri, 22 Apr 2016 15:18:11 -0700 (PDT) X-Received: by 10.98.84.2 with SMTP id i2mr31719523pfb.156.1461363483825; Fri, 22 Apr 2016 15:18:03 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x127si9007272pfb.139.2016.04.22.15.18.03; Fri, 22 Apr 2016 15:18:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753528AbcDVWRe (ORCPT + 29 others); Fri, 22 Apr 2016 18:17:34 -0400 Received: from mail-ob0-f170.google.com ([209.85.214.170]:33617 "EHLO mail-ob0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753421AbcDVWRb (ORCPT ); Fri, 22 Apr 2016 18:17:31 -0400 Received: by mail-ob0-f170.google.com with SMTP id tz8so55901922obc.0 for ; Fri, 22 Apr 2016 15:17:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H/uvj2/5sOClQN8MclD4xWBX10uYGRcyJ9KWrW04odQ=; b=IjMgtEToyiUzIMwCfwWCSU/rffcFndd02lfuRh8DpHCXjXooiIY+0H2eenJYp1Aj3C wWhQsFwqyJlDngmomnj6vkk19OYDqcTDBFbgXqg6zisIk70NDyweQPgP7Y0zARthBnzF qqUEjEdkyiWloQul/JRpmod88hfS5W0u5IRgY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=H/uvj2/5sOClQN8MclD4xWBX10uYGRcyJ9KWrW04odQ=; b=abiMKk6amA5xSgmZMvKzzISiWEfSMb1s2Mx7yagYbXREkkCzVye8TWxp2TtjuYkwoS B7KxgMNnXDAJoi7h3tNY6EN9p/i2+DvL3vki9s3zRRJuM9P+Pynws+u9Z5jcl+ihsyYy s2KRUNe6bnfhgCCBucd6v3z6alVFa0dmnPTBWSdSC1krcCQGjd0zRH8T3/c5vHGFuiKc pPacc382PLqTMDi2PsDLqaGu3tqz+eg501oV+ZXwvUDgHhI7vuZMRHg8K6rhsAEuMBtc 9ntUuz088H66fgbU4jSaFDO3HSvswtk1anAjLCzybx/TOAqE7nIVBzVa6fGuTUVle4bV 5OTw== X-Gm-Message-State: AOPr4FWvzWmIB6cJsNP/IlV29KZ/7RXeYpQiCoesXVHNPzRHIQxZ4YBxz53Ga2GfV5sh8Agm X-Received: by 10.182.105.65 with SMTP id gk1mr9670759obb.37.1461363450851; Fri, 22 Apr 2016 15:17:30 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:a419:15a3:ad7f:f979]) by smtp.gmail.com with ESMTPSA id xt3sm2651996obc.28.2016.04.22.15.17.30 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 22 Apr 2016 15:17:30 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stephen Boyd , devicetree@vger.kernel.org, Bjorn Andersson , jilai wang , Andy Gross Subject: [PATCH 6/8] firmware: qcom: scm: Add memory allocation API Date: Fri, 22 Apr 2016 17:17:10 -0500 Message-Id: <1461363432-5730-7-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461363432-5730-1-git-send-email-andy.gross@linaro.org> References: <1461363432-5730-1-git-send-email-andy.gross@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds APIs for the scm-32 and scm-64 to use for coherent memory allocation. Signed-off-by: Andy Gross --- drivers/firmware/qcom_scm.c | 17 +++++++++++++++++ drivers/firmware/qcom_scm.h | 4 ++++ 2 files changed, 21 insertions(+) -- 1.9.1 diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 7d7b12b..6e3defb 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "qcom_scm.h" @@ -171,6 +172,22 @@ static void qcom_scm_init(void) __qcom_scm_init(); } +void *qcom_scm_alloc_buffer(size_t size, dma_addr_t *dma_addr, + gfp_t gfp) +{ + if (__scm) + return dma_alloc_writecombine(__scm->dev, size, dma_addr, gfp); + else + return ERR_PTR(-ENODEV); +} + +void qcom_scm_free_buffer(size_t size, void *cpu_addr, + dma_addr_t dma_addr) +{ + if (__scm) + dma_free_writecombine(__scm->dev, size, cpu_addr, dma_addr); +} + static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index d3f1f0a..33215b4 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -37,6 +37,10 @@ extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); extern void __qcom_scm_init(void); +extern void *qcom_scm_alloc_buffer(size_t size, dma_addr_t *dma_addr, + gfp_t gfp); +extern void qcom_scm_free_buffer(size_t size, void *virt_addr, + dma_addr_t dma_addr); /* common error codes */ #define QCOM_SCM_V2_EBUSY -12 #define QCOM_SCM_ENOMEM -5