From patchwork Fri Apr 22 22:17:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 66500 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp962329qge; Fri, 22 Apr 2016 15:17:57 -0700 (PDT) X-Received: by 10.98.42.150 with SMTP id q144mr31889832pfq.73.1461363477633; Fri, 22 Apr 2016 15:17:57 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 144si8985625pfx.223.2016.04.22.15.17.57; Fri, 22 Apr 2016 15:17:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753565AbcDVWRg (ORCPT + 29 others); Fri, 22 Apr 2016 18:17:36 -0400 Received: from mail-oi0-f51.google.com ([209.85.218.51]:33346 "EHLO mail-oi0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753463AbcDVWRc (ORCPT ); Fri, 22 Apr 2016 18:17:32 -0400 Received: by mail-oi0-f51.google.com with SMTP id r78so130023726oie.0 for ; Fri, 22 Apr 2016 15:17:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=s1bNpb93/qeiZUWFbOr+9icyhN79uBu6WJgLtF64n2c=; b=WSV6oGHnZzc5WD92/4E/LTmXD7wZiVeATE35JpU9dJRhF5N2Lx2Q+O+omy80vBKv9i B/FZrPmM8wnUPscv5fW6U7eLvuxmfTEgp9z4Ab5bexBCnAUqBQKoXPDDwZgEz0QagtU1 GP0M1ulbDD9568vxUKh9yuj/KKPIm5NlQKZQE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=s1bNpb93/qeiZUWFbOr+9icyhN79uBu6WJgLtF64n2c=; b=in5DKym2wtaJgGCfBfYxfir+NpB2tREEV7DodrojHBzZoAYLZTgzyr4n1HpvkvyoAI eFH2Nbtle1AI4kz7DlZQuRu4b7y/IN6GNOr4dFKOAh3VVkvLzO2WmQnM/5JhPlEGODz3 A6Yj1xdfzrKTn7h9JB3deUKm/SXfuX11fbdOE6sGZi81JJtjwuzWSw5K+Da/ZydU1z+Z UiYHNN33QMvtrvrCXUunOHi9Jt95CoUU8Ot3StHQKvqmgEP4TBqZI1hBgA1bFv1UbIVW lfvW9MjFhhXsADepYJRdI8ongwBPhKjJny35h96B0Cn+UOY+ffIU5c7jYLSeO0pMLx+R /8qw== X-Gm-Message-State: AOPr4FUiYDhDXZpLs2IA7QgT59rob2+SWMAfzoyOvrDBhReFcsmz6Ra5e3+BcfwgKzH2Ful5 X-Received: by 10.157.26.24 with SMTP id a24mr2583214ote.54.1461363451781; Fri, 22 Apr 2016 15:17:31 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:a419:15a3:ad7f:f979]) by smtp.gmail.com with ESMTPSA id 40sm2661345otg.28.2016.04.22.15.17.31 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 22 Apr 2016 15:17:31 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stephen Boyd , devicetree@vger.kernel.org, Bjorn Andersson , jilai wang , Andy Gross Subject: [PATCH 7/8] dts: qcom: apq8084: Add SCM firmware node Date: Fri, 22 Apr 2016 17:17:11 -0500 Message-Id: <1461363432-5730-8-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461363432-5730-1-git-send-email-andy.gross@linaro.org> References: <1461363432-5730-1-git-send-email-andy.gross@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the firmware node for the SCM Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8084.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index a33a09f..711b6fb 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -86,6 +86,16 @@ }; }; + firmware { + compatible = "simple-bus"; + + scm { + compatible = "qcom,scm-apq8084"; + clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 7 0xf04>;