From patchwork Fri May 13 03:47:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 67716 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp59683qge; Thu, 12 May 2016 20:47:58 -0700 (PDT) X-Received: by 10.66.228.201 with SMTP id sk9mr19508636pac.5.1463111278829; Thu, 12 May 2016 20:47:58 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id fm7si21924557pad.166.2016.05.12.20.47.58; Thu, 12 May 2016 20:47:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753282AbcEMDrc (ORCPT + 29 others); Thu, 12 May 2016 23:47:32 -0400 Received: from mail-oi0-f42.google.com ([209.85.218.42]:35267 "EHLO mail-oi0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752651AbcEMDr2 (ORCPT ); Thu, 12 May 2016 23:47:28 -0400 Received: by mail-oi0-f42.google.com with SMTP id x19so152001241oix.2 for ; Thu, 12 May 2016 20:47:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0dBC5t7Gdyawz2p2nPwhWYC9Kx2aCtAEnGxW3QSKd8A=; b=OyGC8dgw4ealeZUJCcV9oxDrpNih+hTyf9RenFmjeCc8rn3MxfSzE897Rzj0Nz44NG dqHrGw75hi2HITDJFEshVWWlj6pt9ItD6GCsaUcWYWO910KjMzDW0L/Z0M1St2e2zi28 PhmxDZNg/xVeXRAw2kYeyIKdMebTpVb4fqAqc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0dBC5t7Gdyawz2p2nPwhWYC9Kx2aCtAEnGxW3QSKd8A=; b=bFrIAXJw7XmsBd6NPoLEdsoaHmGc/FN+/XvToejPt85WCXdWHY1JvEtSSmd8+CHqVo fxp5/+B7tNnRtcMQM9u0E1VPegJNMOaDs6PSX9KMldmSH6WGodL/GJT71KOE+VPQlfXZ 3eTVUKRpTeJ7oAUCkfquOc2dJxbiDtaCPY2nIqth9MczTz7supn7TFTLrJufzr4JRUBP enZ8TJ0SWnsXDbTTOpWAafrSPiKndw3DS2w97ozhM6TlJavlhVfB+NUqcnSBMgU2v/mX Jy1TaK3mTyxzdcEoyoyhSk8jjYZjkFBBgvUkd1hehtGWFQs1BZED0wvEZekta8ddJmRZ tdRQ== X-Gm-Message-State: AOPr4FVgdyKee08UfvkmiLeZ3VoG4+uCWenalarx0N2t+QeJfBMrcAE+mROCAy4/rsA6y/96 X-Received: by 10.202.77.146 with SMTP id a140mr7572781oib.86.1463111247944; Thu, 12 May 2016 20:47:27 -0700 (PDT) Received: from localhost (108-85-129-155.lightspeed.austtx.sbcglobal.net. [108.85.129.155]) by smtp.gmail.com with ESMTPSA id tz3sm4890281obc.0.2016.05.12.20.47.27 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 12 May 2016 20:47:27 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Stephen Boyd , devicetree@vger.kernel.org, jilai wang , Andy Gross Subject: [Patch v5 7/8] dts: qcom: apq8084: Add SCM firmware node Date: Thu, 12 May 2016 22:47:00 -0500 Message-Id: <1463111221-6963-8-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463111221-6963-1-git-send-email-andy.gross@linaro.org> References: <1463111221-6963-1-git-send-email-andy.gross@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the firmware node for the SCM Acked-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8084.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index a33a09f..7c2df06 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -86,6 +86,14 @@ }; }; + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 7 0xf04>;