From patchwork Thu Jun 30 00:48:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 71211 Delivered-To: patches@linaro.org Received: by 10.140.28.4 with SMTP id 4csp131870qgy; Wed, 29 Jun 2016 17:49:25 -0700 (PDT) X-Received: by 10.66.54.35 with SMTP id g3mr16848207pap.30.1467247759438; Wed, 29 Jun 2016 17:49:19 -0700 (PDT) Return-Path: Received: from mail-pf0-x235.google.com (mail-pf0-x235.google.com. [2607:f8b0:400e:c00::235]) by mx.google.com with ESMTPS id u190si1188032pfb.239.2016.06.29.17.49.19 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 29 Jun 2016 17:49:19 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c00::235 as permitted sender) client-ip=2607:f8b0:400e:c00::235; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c00::235 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by mail-pf0-x235.google.com with SMTP id t190so23300958pfb.3 for ; Wed, 29 Jun 2016 17:49:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/chiIjEwY3L9EiRGYZBOI57kVlq6wjJRRnGkErd/2h4=; b=kCIYSxk71VuhRAl3EtPShXbMIluglhrd1iT4mN+Hivp99CfmqqNnUQJtbgK+KXyrg3 yvKZK7Haqpkdz4ZDgWIerIjE0TBR0fe0XZn3t0ltg4VKt79MvvQxCrlXTmtGxKm6Yhqh 5l36ok9ajIhE40W7WAc7X9NRNmaQK4M7SqCZU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/chiIjEwY3L9EiRGYZBOI57kVlq6wjJRRnGkErd/2h4=; b=EPC2eaA2eRs5+eXPWznEHpRMUvpO5tsZsv7xO5LmiaUhnUCj8Fu3hSHl2ATDz4OTiF yfSIqqP5f55sDLi0M8eDblCLQbGpHute997GLQeVaNs0wl2vevkG01UgaQeoiUCAmAkD Xn5AgaMKBGk3B4+3Yfv2pIY6MUq4N3ZujY+5dvcWsSMmTFXjaSQQD/AMvxYJ7ZMUssik Sf4+xNQh+oP/9RmaDIk4TJ7fkzrZNCJo3J6IRgJTM7+4EF2n8zSoO7dQFGnhXtW7G8v9 5XT8L4YWyXm9/xWvBd30uzE5Pz+Z7EhA8uZdDff5eplKdaYVEsZrpYPHINH9rgqfbIY9 z/Lw== X-Gm-Message-State: ALyK8tJJtb/CSmN0JpY4ai6WQD+bpEp9pyxbf3Ey7gcWIcns2LHvijbWUCX3Q1HyLeGuWAX7UrE= X-Received: by 10.98.30.199 with SMTP id e190mr16830006pfe.146.1467247759176; Wed, 29 Jun 2016 17:49:19 -0700 (PDT) Return-Path: Received: from localhost.localdomain (c-73-67-244-238.hsd1.or.comcast.net. [73.67.244.238]) by smtp.gmail.com with ESMTPSA id ot2sm698503pac.29.2016.06.29.17.49.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 29 Jun 2016 17:49:18 -0700 (PDT) From: John Stultz To: lkml , arm@kernel.org Cc: Zhangfei Gao , Michael Turquette , Stephen Boyd , Rob Herring , Pawel Moll , Wei Xu , Guodong Xu , John Stultz Subject: [PATCH 2/2 v3] arm64: dts: hi6220: Add pl031 RTC support Date: Wed, 29 Jun 2016 17:48:45 -0700 Message-Id: <1467247725-3665-3-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467247725-3665-1-git-send-email-john.stultz@linaro.org> References: <1467247725-3665-1-git-send-email-john.stultz@linaro.org> From: Zhangfei Gao Add pl031 rtc0 and rtc1 support to hi6220 dtsi Cc: Michael Turquette Cc: Stephen Boyd Cc: Rob Herring Cc: Pawel Moll Cc: Wei Xu Cc: Guodong Xu Acked-by: Wei Xu Signed-off-by: Zhangfei Gao [jstultz: Forward ported and tweaked commit description, added rtc1 entry as suggested by Guodong] Signed-off-by: John Stultz --- v2: Add rtc1 entry as suggested by Guodong v3: Whitespace fixup requested by Wei arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 189d215..758fd22 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -336,6 +336,22 @@ clock-names = "timer1", "timer2", "apb_pclk"; }; + rtc0: rtc@f8003000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x0 0xf8003000 0x0 0x1000>; + interrupts = <0 12 4>; + clocks = <&ao_ctrl HI6220_RTC0_PCLK>; + clock-names = "apb_pclk"; + }; + + rtc1: rtc@f8004000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x0 0xf8004000 0x0 0x1000>; + interrupts = <0 8 4>; + clocks = <&ao_ctrl HI6220_RTC1_PCLK>; + clock-names = "apb_pclk"; + }; + pmx0: pinmux@f7010000 { compatible = "pinctrl-single"; reg = <0x0 0xf7010000 0x0 0x27c>;