From patchwork Sun Sep 18 13:37:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoyou Xie X-Patchwork-Id: 76470 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp530870qgf; Sun, 18 Sep 2016 06:39:01 -0700 (PDT) X-Received: by 10.98.7.4 with SMTP id b4mr38742845pfd.136.1474205941800; Sun, 18 Sep 2016 06:39:01 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c19si18202066pfb.235.2016.09.18.06.39.01; Sun, 18 Sep 2016 06:39:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932657AbcIRNi7 (ORCPT + 27 others); Sun, 18 Sep 2016 09:38:59 -0400 Received: from mail-pf0-f173.google.com ([209.85.192.173]:32869 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756552AbcIRNi6 (ORCPT ); Sun, 18 Sep 2016 09:38:58 -0400 Received: by mail-pf0-f173.google.com with SMTP id 21so31176730pfy.0 for ; Sun, 18 Sep 2016 06:38:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Q5ay06DCtq/GjFKd+Ys7Cmx89/9UmjRjHSFwil2+HUk=; b=W/DwYbFp/rNpZuvQCbcMpRzxIZAaS3SNEHrYy4td9RTZ+oBFuDWPvKnyACyBVpCe4m IbYzoHWTLMYMu4joA56uh/RFvYfgK57sRgvxkbZ1k0AQnYqqPesFNevWRlzPsC+mMFER SzSW8OpV0Y5CyVmrv4RtXcwMD+kCp4GpP9Js4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Q5ay06DCtq/GjFKd+Ys7Cmx89/9UmjRjHSFwil2+HUk=; b=FKQhchDhDFJZdPt3f+TSG9a2hh760x78O94O2XgsMmz8rLfRloKN++Tjxm1c5kxJh2 IJvGEBDWrFPb2Zh1vCVYXOoyxtZrKVF07b3FvkpJGsOvdCJsOSbYQnEYacNfz8Yl66+X xQStPYFGHIDSkDFQt6GSyZtiT06hZ9UTcLjhOnf92588oeVKpJ9kjvQbjaZ62LCleDXW bAmOxgysyfKnicK2vxvYkYqEO5433K5V9jt+meQY3QS9yye+UIVDcyMgkSe0Sk+16B1H bSAPs6+ZQ5Uzbiac0m/uP3FV02nL8gswYMqKJD6mY5biBvnXYQxTYSI3YYbN5CWdXAbQ rGuw== X-Gm-Message-State: AE9vXwM7MIWCrBEP6TnW9284jZjiLzUQGVWk3oeU8Jpf8ktHCxz18A8mMtb5uwPB62rNIG9m X-Received: by 10.98.85.198 with SMTP id j189mr10129554pfb.123.1474205937467; Sun, 18 Sep 2016 06:38:57 -0700 (PDT) Received: from localhost.localdomain ([104.237.91.27]) by smtp.gmail.com with ESMTPSA id bm8sm24641643pac.16.2016.09.18.06.38.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 18 Sep 2016 06:38:56 -0700 (PDT) From: Baoyou Xie To: alexander.deucher@amd.com, christian.koenig@amd.com, airlied@linux.ie, nicolai.haehnle@amd.com Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, arnd@arndb.de, baoyou.xie@linaro.org, xie.baoyou@zte.com.cn Subject: [PATCH] drm/amdgpu: amend amdgpu_gfx_parse_disable_cu() declaration Date: Sun, 18 Sep 2016 21:37:37 +0800 Message-Id: <1474205857-5177-1-git-send-email-baoyou.xie@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In amdgpu_gfx.h, the declaration of amdgpu_gfx_parse_disable_cu() is incorrect. Signed-off-by: Baoyou Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4 +++- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 5 ++++- 2 files changed, 7 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 01a42b6..8575039 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c @@ -82,7 +82,9 @@ void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg) * The bitmask of CUs to be disabled in the shader array determined by se and * sh is stored in mask[se * max_sh + sh]. */ -void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_sh) +void amdgpu_gfx_parse_disable_cu(unsigned int *mask, + unsigned int max_se, + unsigned int max_sh) { unsigned se, sh, cu; const char *p; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 51321e1..0b9ad4f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -27,6 +27,9 @@ int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, uint32_t *reg); void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg); -unsigned amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_sh); +void +amdgpu_gfx_parse_disable_cu(unsigned int *mask, + unsigned int max_se, + unsigned int max_sh); #endif