From patchwork Fri Sep 30 08:14:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoyou Xie X-Patchwork-Id: 77164 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp140459qgf; Fri, 30 Sep 2016 01:15:05 -0700 (PDT) X-Received: by 10.66.249.170 with SMTP id yv10mr9737636pac.16.1475223305149; Fri, 30 Sep 2016 01:15:05 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id gt9si18954447pac.235.2016.09.30.01.15.04; Fri, 30 Sep 2016 01:15:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752500AbcI3IPC (ORCPT + 27 others); Fri, 30 Sep 2016 04:15:02 -0400 Received: from mail-pf0-f175.google.com ([209.85.192.175]:35028 "EHLO mail-pf0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932254AbcI3IOr (ORCPT ); Fri, 30 Sep 2016 04:14:47 -0400 Received: by mail-pf0-f175.google.com with SMTP id s13so37925787pfd.2 for ; Fri, 30 Sep 2016 01:14:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=THtQtIW/IUUbgshPnfwex12R73HL/bWfzJ9YM9vCUjY=; b=MRXUeCeSbZpOAujbCgHeiN3uxZVNDfqRxbUM8ssvLpF6FpmAgqCgQneBYZT2nr+aZo fcWpqtuJMy7NVsCimD7fCSCsLPL9qPRSyXkJClzln/FDaQQMBV50DyBhcntjegcg4kRd On4dvx9jzZZ2fHO878UqOzjYC5/aujv1ZGzhg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=THtQtIW/IUUbgshPnfwex12R73HL/bWfzJ9YM9vCUjY=; b=BR5VFShkwRexcfxbB0x3Y9hThY2kt/2+x+RfkOe6K5LYRNBggEwOPEvTBobZtvlEJr fQzOVWxyouIMF0o5VUPfwPEezWpUS2G71R4CJU7jWjKG5l/9e64FzdeBBXYaazZAjT4q yBAZR9zX0zh4ItHDJg8clnrhXuTTmNa8Dfpf0b7YG+8E2wWdpAtzx7ND+XeuQOXI1JUB 85CHkRP5o4qa7QN9haOBpIc+zfomUG66UpIRzrH31B1mhpUxWrLUUmjByyYTb39F6A7z Jy5bUvrAggCR4dfyy0lst+lBO1uy0TKSkXAosnaDiG3R3o7NziDpZaaYuoeEoBaM9axR un4w== X-Gm-Message-State: AA6/9RmF9b7EaKYAaPQQYsBwVy7nod7bijC5fLVG0QxNFnASWNwnY3r8dKTaQhNJC5rlgGf8 X-Received: by 10.98.97.7 with SMTP id v7mr9478241pfb.140.1475223286216; Fri, 30 Sep 2016 01:14:46 -0700 (PDT) Received: from localhost.localdomain ([104.237.91.182]) by smtp.gmail.com with ESMTPSA id 25sm25606640pfj.23.2016.09.30.01.14.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 30 Sep 2016 01:14:45 -0700 (PDT) From: Baoyou Xie To: alexander.deucher@amd.com, christian.koenig@amd.com, airlied@linux.ie Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, arnd@arndb.de, baoyou.xie@linaro.org, xie.baoyou@zte.com.cn, han.fei@zte.com.cn, tang.qiang007@zte.com.cn Subject: [PATCH 2/3] drm/radeon: clean function declarations up Date: Fri, 30 Sep 2016 16:14:33 +0800 Message-Id: <1475223273-19779-1-git-send-email-baoyou.xie@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We get a few warnings when building kernel with W=1: drivers/gpu/drm/radeon/radeon_device.c:642:6: warning: no previous prototype for 'radeon_device_is_virtual' [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:56:5: warning: no previous prototype for 'radeon_driver_unload_kms' [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:97:5: warning: no previous prototype for 'radeon_driver_load_kms' [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:612:6: warning: no previous prototype for 'radeon_driver_lastclose_kms' [-Wmissing-prototypes] .... In fact, these functions are declared in some source files, but should be declared in a header file, thus can be recognized in other file. So this patch declares them in drivers/gpu/drm/radeon/radeon.h. Signed-off-by: Baoyou Xie --- drivers/gpu/drm/radeon/atombios_encoders.c | 4 - drivers/gpu/drm/radeon/btc_dpm.c | 4 - drivers/gpu/drm/radeon/ci_dpm.c | 10 -- drivers/gpu/drm/radeon/cik.c | 14 -- drivers/gpu/drm/radeon/cik_sdma.c | 2 - drivers/gpu/drm/radeon/cypress_dpm.c | 4 - drivers/gpu/drm/radeon/evergreen.c | 11 -- drivers/gpu/drm/radeon/evergreen_cs.c | 2 - drivers/gpu/drm/radeon/evergreen_dma.c | 2 - drivers/gpu/drm/radeon/kv_dpm.c | 5 - drivers/gpu/drm/radeon/ni.c | 11 -- drivers/gpu/drm/radeon/ni_dma.c | 2 - drivers/gpu/drm/radeon/ni_dpm.c | 3 - drivers/gpu/drm/radeon/r600.c | 2 - drivers/gpu/drm/radeon/r600_dma.c | 2 - drivers/gpu/drm/radeon/radeon.h | 207 +++++++++++++++++++++++++++++ drivers/gpu/drm/radeon/radeon_acpi.c | 2 - drivers/gpu/drm/radeon/radeon_asic.h | 9 -- drivers/gpu/drm/radeon/radeon_atombios.c | 9 -- drivers/gpu/drm/radeon/radeon_audio.c | 63 --------- drivers/gpu/drm/radeon/radeon_encoders.c | 8 -- drivers/gpu/drm/radeon/radeon_i2c.c | 4 - drivers/gpu/drm/radeon/radeon_kms.c | 6 +- drivers/gpu/drm/radeon/radeon_object.c | 2 - drivers/gpu/drm/radeon/rv730_dpm.c | 3 - drivers/gpu/drm/radeon/rv740_dpm.c | 2 - drivers/gpu/drm/radeon/si.c | 10 -- drivers/gpu/drm/radeon/si_dma.c | 2 - drivers/gpu/drm/radeon/si_dpm.c | 8 -- drivers/gpu/drm/radeon/sumo_smc.c | 2 - drivers/gpu/drm/radeon/trinity_dpm.c | 1 - 31 files changed, 210 insertions(+), 206 deletions(-) -- 2.7.4 diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index fa4f8f0..2bbb916 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c @@ -291,10 +291,6 @@ static void radeon_atom_backlight_exit(struct radeon_encoder *encoder) #endif -/* evil but including atombios.h is much worse */ -bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, - struct drm_display_mode *mode); - static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c index 38e5123..2b08cfd 100644 --- a/drivers/gpu/drm/radeon/btc_dpm.c +++ b/drivers/gpu/drm/radeon/btc_dpm.c @@ -47,10 +47,6 @@ #ifndef BTC_MGCG_SEQUENCE #define BTC_MGCG_SEQUENCE 300 -struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); - extern int ni_mc_load_microcode(struct radeon_device *rdev); //********* BARTS **************// diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 7ba4508..57ac808 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -165,16 +165,6 @@ static const struct ci_pt_config_reg didt_config_ci[] = extern u8 rv770_get_memory_module_index(struct radeon_device *rdev); extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, u32 arb_freq_src, u32 arb_freq_dest); -extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock); -extern u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode); -extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, - u32 max_voltage_steps, - struct atom_voltage_table *voltage_table); -extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev); -extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); -extern int ci_mc_load_microcode(struct radeon_device *rdev); -extern void cik_update_cg(struct radeon_device *rdev, - u32 block, bool enable); static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev, struct atom_voltage_table_entry *voltage_table, diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index f6ff41a..7f2daf5 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -118,21 +118,7 @@ MODULE_FIRMWARE("radeon/mullins_mec.bin"); MODULE_FIRMWARE("radeon/mullins_rlc.bin"); MODULE_FIRMWARE("radeon/mullins_sdma.bin"); -extern int r600_ih_ring_alloc(struct radeon_device *rdev); -extern void r600_ih_ring_fini(struct radeon_device *rdev); -extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern bool evergreen_is_display_hung(struct radeon_device *rdev); -extern void sumo_rlc_fini(struct radeon_device *rdev); -extern int sumo_rlc_init(struct radeon_device *rdev); -extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); -extern void si_rlc_reset(struct radeon_device *rdev); -extern void si_init_uvd_internal_cg(struct radeon_device *rdev); static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh); -extern int cik_sdma_resume(struct radeon_device *rdev); -extern void cik_sdma_enable(struct radeon_device *rdev, bool enable); -extern void cik_sdma_fini(struct radeon_device *rdev); -extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable); static void cik_rlc_stop(struct radeon_device *rdev); static void cik_pcie_gen3_enable(struct radeon_device *rdev); static void cik_program_aspm(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 9c351dc..5f0862d 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c @@ -33,8 +33,6 @@ #define CIK_SDMA_UCODE_SIZE 1050 #define CIK_SDMA_UCODE_VERSION 64 -u32 cik_gpu_check_soft_reset(struct radeon_device *rdev); - /* * sDMA - System DMA * Starting with CIK, the GPU has new asynchronous diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c b/drivers/gpu/drm/radeon/cypress_dpm.c index a4edd07..3bdb82e 100644 --- a/drivers/gpu/drm/radeon/cypress_dpm.c +++ b/drivers/gpu/drm/radeon/cypress_dpm.c @@ -42,10 +42,6 @@ #define MC_CG_SEQ_YCLK_SUSPEND 0x04 #define MC_CG_SEQ_YCLK_RESUME 0x0a -struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); - static void cypress_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, bool enable) { diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 0b6b576..943a696 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -205,17 +205,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev); void evergreen_fini(struct radeon_device *rdev); void evergreen_pcie_gen2_enable(struct radeon_device *rdev); void evergreen_program_aspm(struct radeon_device *rdev); -extern void cayman_cp_int_cntl_setup(struct radeon_device *rdev, - int ring, u32 cp_int_cntl); -extern void cayman_vm_decode_fault(struct radeon_device *rdev, - u32 status, u32 addr); -void cik_init_cp_pg_table(struct radeon_device *rdev); - -extern u32 si_get_csb_size(struct radeon_device *rdev); -extern void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); -extern u32 cik_get_csb_size(struct radeon_device *rdev); -extern void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); -extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); static const u32 evergreen_golden_registers[] = { diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index f8b0509..cfc4cc9 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -37,8 +37,6 @@ #define REG_SAFE_BM_SIZE ARRAY_SIZE(evergreen_reg_safe_bm) -int r600_dma_cs_next_reloc(struct radeon_cs_parser *p, - struct radeon_bo_list **cs_reloc); struct evergreen_cs_track { u32 group_size; u32 nbanks; diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c index 96535aa..67f350e 100644 --- a/drivers/gpu/drm/radeon/evergreen_dma.c +++ b/drivers/gpu/drm/radeon/evergreen_dma.c @@ -26,8 +26,6 @@ #include "radeon_asic.h" #include "evergreend.h" -u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev); - /** * evergreen_dma_fence_ring_emit - emit a fence on the DMA ring * diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c index a7e9786..dee537c 100644 --- a/drivers/gpu/drm/radeon/kv_dpm.c +++ b/drivers/gpu/drm/radeon/kv_dpm.c @@ -58,11 +58,6 @@ static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate); static void kv_dpm_powergate_samu(struct radeon_device *rdev, bool gate); static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate); -extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev); -extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); -extern void cik_update_cg(struct radeon_device *rdev, - u32 block, bool enable); - static const struct kv_lcac_config_values sx_local_cac_cfg_kv[] = { { 0, 4, 1 }, diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 103fc86..1a69aa0 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -187,20 +187,9 @@ static const u32 tn_rlc_save_restore_register_list[] = 0x802c, }; -extern bool evergreen_is_display_hung(struct radeon_device *rdev); -extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); -extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev); -extern void evergreen_mc_program(struct radeon_device *rdev); -extern void evergreen_irq_suspend(struct radeon_device *rdev); -extern int evergreen_mc_init(struct radeon_device *rdev); -extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); extern void evergreen_program_aspm(struct radeon_device *rdev); -extern void sumo_rlc_fini(struct radeon_device *rdev); -extern int sumo_rlc_init(struct radeon_device *rdev); -extern void evergreen_gpu_pci_config_reset(struct radeon_device *rdev); /* Firmware Names */ MODULE_FIRMWARE("radeon/BARTS_pfp.bin"); diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index ce787a9..62165f9d 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c @@ -27,8 +27,6 @@ #include "radeon_trace.h" #include "nid.h" -u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); - /* * DMA * Starting with R600, the GPU has an asynchronous diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 4a601f9..1ad4bf3 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c @@ -718,9 +718,6 @@ static const u32 cayman_sysls_enable[] = }; #define CAYMAN_SYSLS_ENABLE_LENGTH sizeof(cayman_sysls_enable) / (3 * sizeof(u32)) -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); - extern int ni_mc_load_microcode(struct radeon_device *rdev); struct ni_power_info *ni_get_pi(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index a951881..dceafe5 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -105,8 +105,6 @@ static void r600_gpu_init(struct radeon_device *rdev); void r600_fini(struct radeon_device *rdev); void r600_irq_disable(struct radeon_device *rdev); static void r600_pcie_gen2_enable(struct radeon_device *rdev); -extern int evergreen_rlc_resume(struct radeon_device *rdev); -extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); /* * Indirect registers accessor diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index fb65e6f..80c1b7a 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c @@ -26,8 +26,6 @@ #include "radeon_asic.h" #include "r600d.h" -u32 r600_gpu_check_soft_reset(struct radeon_device *rdev); - /* * DMA * Starting with R600, the GPU has an asynchronous diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 1b0dcad..9c02fbc 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -2976,4 +2976,211 @@ int r600_cs_common_vline_parse(struct radeon_cs_parser *p, #include "radeon_object.h" +extern bool radeon_device_is_virtual(void); +extern int radeon_driver_unload_kms(struct drm_device *dev); +extern int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); +extern void radeon_driver_lastclose_kms(struct drm_device *dev); +extern int +radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); +extern void radeon_driver_postclose_kms(struct drm_device *dev, + struct drm_file *file_priv); +extern void radeon_driver_preclose_kms(struct drm_device *dev, + struct drm_file *file_priv); +extern u32 +radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe); +extern int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe); +extern void +radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe); +extern int +radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe, + int *max_error, struct timeval *vblank_time, + unsigned int flags); +bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, + struct drm_display_mode *mode); +/* from radeon_object.c */ +int radeon_ttm_init(struct radeon_device *rdev); +void radeon_ttm_fini(struct radeon_device *rdev); + +extern int radeon_mmap(struct file *filp, struct vm_area_struct *vma); + +void radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, + struct drm_connector *drm_connector); +void radeon_add_legacy_encoder(struct drm_device *dev, + uint32_t encoder_enum, uint32_t supported_device); + +extern void radeon_gem_object_free(struct drm_gem_object *obj); +extern int radeon_gem_object_open(struct drm_gem_object *obj, + struct drm_file *file_priv); +extern void radeon_gem_object_close(struct drm_gem_object *obj, + struct drm_file *file_priv); +extern irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); +extern void radeon_driver_irq_preinstall_kms(struct drm_device *dev); +extern int radeon_driver_irq_postinstall_kms(struct drm_device *dev); +extern void radeon_driver_irq_uninstall_kms(struct drm_device *dev); + +u32 r600_gpu_check_soft_reset(struct radeon_device *rdev); +int r600_ih_ring_alloc(struct radeon_device *rdev); +void r600_ih_ring_fini(struct radeon_device *rdev); +void rv770_set_clk_bypass_mode(struct radeon_device *rdev); +void radeon_pm_acpi_event_handler(struct radeon_device *rdev); +void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, + const struct radeon_hdmi_acr *acr); +void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, + unsigned char *buffer, size_t size); +void r600_hdmi_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); +void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); +void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); +void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); +void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, + struct cea_sad *sads, int sad_count); +void dce3_2_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, + const struct radeon_hdmi_acr *acr); +void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); +void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); + +/* + * evergreen + */ +struct evergreen_mc_save { + u32 vga_render_control; + u32 vga_hdp_control; + bool crtc_enabled[RADEON_MAX_CRTCS]; +}; + +void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); +u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); +void +evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); +void +evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); +void evergreen_mc_program(struct radeon_device *rdev); +int evergreen_mc_init(struct radeon_device *rdev); +void evergreen_print_gpu_status_regs(struct radeon_device *rdev); +bool evergreen_is_display_hung(struct radeon_device *rdev); +u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev); +void evergreen_gpu_pci_config_reset(struct radeon_device *rdev); + +void sumo_rlc_fini(struct radeon_device *rdev); +int sumo_rlc_init(struct radeon_device *rdev); +int evergreen_rlc_resume(struct radeon_device *rdev); +void evergreen_irq_suspend(struct radeon_device *rdev); +void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, + u8 enable_mask); +void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, + const struct radeon_hdmi_acr *acr); +void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, + struct drm_connector *connector, struct drm_display_mode *mode); +void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, + struct cea_sad *sads, int sad_count); +void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, + unsigned char *buffer, size_t size); +void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce4_dp_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); +void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, + u32 offset, int bpc); +void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); +void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); +void cayman_cp_int_cntl_setup(struct radeon_device *rdev, + int ring, u32 cp_int_cntl); +u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); +void cayman_vm_decode_fault(struct radeon_device *rdev, + u32 status, u32 addr); +void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); +void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); + +void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, + struct drm_connector *drm_connector); +void radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, + uint32_t supported_device, u16 caps); +int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg *msgs, int num); +u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap); + +int si_mc_load_microcode(struct radeon_device *rdev); +u32 si_gpu_check_soft_reset(struct radeon_device *rdev); +void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); +void si_init_uvd_internal_cg(struct radeon_device *rdev); +u32 si_get_csb_size(struct radeon_device *rdev); +void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); +void si_rlc_reset(struct radeon_device *rdev); + +extern struct sg_table * +radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); +extern void *radeon_gem_prime_vmap(struct drm_gem_object *obj); +extern void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); + +extern struct drm_gem_object * +radeon_gem_prime_import_sg_table(struct drm_device *dev, + struct dma_buf_attachment *attach, struct sg_table *sg); + +extern int radeon_gem_prime_pin(struct drm_gem_object *obj); +extern void radeon_gem_prime_unpin(struct drm_gem_object *obj); +extern struct reservation_object * +radeon_gem_prime_res_obj(struct drm_gem_object *obj); +extern struct dma_buf *radeon_gem_prime_export(struct drm_device *dev, + struct drm_gem_object *gobj, int flags); + +int ci_mc_load_microcode(struct radeon_device *rdev); +u32 cik_gpu_check_soft_reset(struct radeon_device *rdev); +void cik_enter_rlc_safe_mode(struct radeon_device *rdev); +void cik_exit_rlc_safe_mode(struct radeon_device *rdev); +void cik_update_cg(struct radeon_device *rdev, u32 block, bool enable); + +void cik_init_cp_pg_table(struct radeon_device *rdev); +u32 cik_get_csb_size(struct radeon_device *rdev); + +void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); +struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); +struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); +struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); +struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev); +struct ni_power_info *ni_get_pi(struct radeon_device *rdev); +struct ni_ps *ni_get_ps(struct radeon_ps *rps); + +u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock); +u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode); +void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, + u32 max_voltage_steps, + struct atom_voltage_table *voltage_table); +u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); +void dce6_endpoint_wreg(struct radeon_device *rdev, u32 offset, u32 reg, u32 v); +void dce6_afmt_select_pin(struct drm_encoder *encoder); +void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, + struct drm_connector *connector, struct drm_display_mode *mode); +void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, struct cea_sad *sads, + int sad_count); +void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce6_dp_audio_set_dto(struct radeon_device *rdev, struct radeon_crtc *crtc, + unsigned int clock); +void cik_sdma_enable(struct radeon_device *rdev, bool enable); +int cik_sdma_resume(struct radeon_device *rdev); +void cik_sdma_fini(struct radeon_device *rdev); + +void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); +void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable); + +int r600_dma_cs_next_reloc(struct radeon_cs_parser *p, + struct radeon_bo_list **cs_reloc); + + #endif diff --git a/drivers/gpu/drm/radeon/radeon_acpi.c b/drivers/gpu/drm/radeon/radeon_acpi.c index 6efbd65..231d01d 100644 --- a/drivers/gpu/drm/radeon/radeon_acpi.c +++ b/drivers/gpu/drm/radeon/radeon_acpi.c @@ -41,8 +41,6 @@ static inline bool radeon_atpx_dgpu_req_power_for_displays(void) { return false; #define ACPI_AC_CLASS "ac_adapter" -extern void radeon_pm_acpi_event_handler(struct radeon_device *rdev); - struct atif_verify_interface { u16 size; /* structure size in bytes (includes size field) */ u16 version; /* version */ diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index e3f036c..48b46fb 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h @@ -498,15 +498,6 @@ bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev); u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev); -/* - * evergreen - */ -struct evergreen_mc_save { - u32 vga_render_control; - u32 vga_hdp_control; - bool crtc_enabled[RADEON_MAX_CRTCS]; -}; - void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); int evergreen_init(struct radeon_device *rdev); void evergreen_fini(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 4134759..4d640de 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c @@ -31,15 +31,6 @@ #include "atom-bits.h" #include "radeon_asic.h" -extern void -radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, - uint32_t supported_device, u16 caps); - -/* from radeon_legacy_encoder.c */ -extern void -radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, - uint32_t supported_device); - union atom_supported_devices { struct _ATOM_SUPPORTED_DEVICES_INFO info; struct _ATOM_SUPPORTED_DEVICES_INFO_2 info_2; diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c index b214663..0303f07 100644 --- a/drivers/gpu/drm/radeon/radeon_audio.c +++ b/drivers/gpu/drm/radeon/radeon_audio.c @@ -31,77 +31,14 @@ void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, u8 enable_mask); -void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, - u8 enable_mask); void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, u8 enable_mask); -u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); -void dce6_endpoint_wreg(struct radeon_device *rdev, - u32 offset, u32 reg, u32 v); -void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, - struct cea_sad *sads, int sad_count); -void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, - struct cea_sad *sads, int sad_count); -void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, - struct cea_sad *sads, int sad_count); -void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, - struct drm_connector *connector, struct drm_display_mode *mode); -void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, - struct drm_connector *connector, struct drm_display_mode *mode); struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); -void dce6_afmt_select_pin(struct drm_encoder *encoder); -void r600_hdmi_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce3_2_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce4_dp_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce6_dp_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, - unsigned char *buffer, size_t size); -void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, - unsigned char *buffer, size_t size); -void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, - const struct radeon_hdmi_acr *acr); -void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, - const struct radeon_hdmi_acr *acr); -void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, - const struct radeon_hdmi_acr *acr); -void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); -void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); -void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, - u32 offset, int bpc); -void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); -void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); -void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); -void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); -void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); -void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode); static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode); -void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); -void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); -void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); static const u32 pin_offsets[7] = { diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index c6ee802..675153e 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c @@ -29,14 +29,6 @@ #include "radeon.h" #include "atom.h" -extern void -radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, - struct drm_connector *drm_connector); -extern void -radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, - struct drm_connector *drm_connector); - - static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) { struct drm_device *dev = encoder->dev; diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index 021aa00..3941588 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c @@ -31,10 +31,6 @@ #include "radeon.h" #include "atom.h" -extern int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, - struct i2c_msg *msgs, int num); -extern u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap); - /** * radeon_ddc_probe * diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 4388dde..f089485 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -830,7 +830,7 @@ u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe) * Enable the interrupt on the requested crtc (all asics). * Returns 0 on success, -EINVAL on failure. */ -int radeon_enable_vblank_kms(struct drm_device *dev, int crtc) +int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int crtc) { struct radeon_device *rdev = dev->dev_private; unsigned long irqflags; @@ -856,7 +856,7 @@ int radeon_enable_vblank_kms(struct drm_device *dev, int crtc) * * Disable the interrupt on the requested crtc (all asics). */ -void radeon_disable_vblank_kms(struct drm_device *dev, int crtc) +void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int crtc) { struct radeon_device *rdev = dev->dev_private; unsigned long irqflags; @@ -885,7 +885,7 @@ void radeon_disable_vblank_kms(struct drm_device *dev, int crtc) * scanout position. (all asics). * Returns postive status flags on success, negative error on failure. */ -int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, +int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int crtc, int *max_error, struct timeval *vblank_time, unsigned flags) diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index be30861..841aa89 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -38,8 +38,6 @@ #include "radeon_trace.h" -int radeon_ttm_init(struct radeon_device *rdev); -void radeon_ttm_fini(struct radeon_device *rdev); static void radeon_bo_clear_surface_reg(struct radeon_bo *bo); /* diff --git a/drivers/gpu/drm/radeon/rv730_dpm.c b/drivers/gpu/drm/radeon/rv730_dpm.c index d37ba2c..ff203ed 100644 --- a/drivers/gpu/drm/radeon/rv730_dpm.c +++ b/drivers/gpu/drm/radeon/rv730_dpm.c @@ -34,9 +34,6 @@ #define MC_CG_ARB_FREQ_F2 0x0c #define MC_CG_ARB_FREQ_F3 0x0d -struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); - int rv730_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock, RV770_SMC_SCLK_VALUE *sclk) diff --git a/drivers/gpu/drm/radeon/rv740_dpm.c b/drivers/gpu/drm/radeon/rv740_dpm.c index 4b85082..2b390e1 100644 --- a/drivers/gpu/drm/radeon/rv740_dpm.c +++ b/drivers/gpu/drm/radeon/rv740_dpm.c @@ -29,8 +29,6 @@ #include "rv770_dpm.h" #include "atom.h" -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); - u32 rv740_get_decoded_reference_divider(u32 encoded_ref) { u32 ref = 0; diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 7ee9aaf..e5ceeb4 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -119,16 +119,6 @@ MODULE_FIRMWARE("radeon/hainan_k_smc.bin"); static u32 si_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh); static void si_pcie_gen3_enable(struct radeon_device *rdev); static void si_program_aspm(struct radeon_device *rdev); -extern void sumo_rlc_fini(struct radeon_device *rdev); -extern int sumo_rlc_init(struct radeon_device *rdev); -extern int r600_ih_ring_alloc(struct radeon_device *rdev); -extern void r600_ih_ring_fini(struct radeon_device *rdev); -extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); -extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); -extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); -extern bool evergreen_is_display_hung(struct radeon_device *rdev); static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, bool enable); static void si_init_pg(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c index 8320792..afe19f8d 100644 --- a/drivers/gpu/drm/radeon/si_dma.c +++ b/drivers/gpu/drm/radeon/si_dma.c @@ -27,8 +27,6 @@ #include "radeon_trace.h" #include "sid.h" -u32 si_gpu_check_soft_reset(struct radeon_device *rdev); - /** * si_dma_is_lockup - Check if the DMA engine is locked up * diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index e6abc09..0a5aff5 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -1734,14 +1734,6 @@ static const struct si_powertune_data powertune_data_hainan = true }; -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); -struct ni_power_info *ni_get_pi(struct radeon_device *rdev); -struct ni_ps *ni_get_ps(struct radeon_ps *rps); - -extern int si_mc_load_microcode(struct radeon_device *rdev); -extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); - static int si_populate_voltage_value(struct radeon_device *rdev, const struct atom_voltage_table *table, u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage); diff --git a/drivers/gpu/drm/radeon/sumo_smc.c b/drivers/gpu/drm/radeon/sumo_smc.c index fb081d2..05ed103 100644 --- a/drivers/gpu/drm/radeon/sumo_smc.c +++ b/drivers/gpu/drm/radeon/sumo_smc.c @@ -31,8 +31,6 @@ #define SUMO_SMU_SERVICE_ROUTINE_ALTVDDNB_NOTIFY 27 #define SUMO_SMU_SERVICE_ROUTINE_GFX_SRV_ID_20 20 -struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev); - static void sumo_send_msg_to_smu(struct radeon_device *rdev, u32 id) { u32 gfx_int_req; diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c index 6730367..2d423b5 100644 --- a/drivers/gpu/drm/radeon/trinity_dpm.c +++ b/drivers/gpu/drm/radeon/trinity_dpm.c @@ -336,7 +336,6 @@ static const u32 trinity_override_mgpg_sequences[] = 0x00000204, 0x00000000, }; -extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev, const u32 *seq, u32 count); static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);