From patchwork Mon Nov 7 13:05:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 81090 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp1008727qge; Mon, 7 Nov 2016 05:20:59 -0800 (PST) X-Received: by 10.99.143.2 with SMTP id n2mr10733308pgd.70.1478524859205; Mon, 07 Nov 2016 05:20:59 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j9si31302695pgn.234.2016.11.07.05.20.58; Mon, 07 Nov 2016 05:20:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932671AbcKGNUh (ORCPT + 27 others); Mon, 7 Nov 2016 08:20:37 -0500 Received: from mail-wm0-f50.google.com ([74.125.82.50]:36858 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932269AbcKGNFd (ORCPT ); Mon, 7 Nov 2016 08:05:33 -0500 Received: by mail-wm0-f50.google.com with SMTP id p190so181509633wmp.1 for ; Mon, 07 Nov 2016 05:05:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0rt5ptZqBEHrkMiBf374pai7VKaOzXWnlK2r/Lyekjk=; b=NPrlJRDxGZI5TsWzl5pA6B4SJJ6HwRBGcF15UAaRq7ElKhJvRE3BE9bz8DC5MAqNx9 MzREVnmfcHaCktgtGYJu8mV7zPJv99+eJ9dEN+DpMrN2371I6BTt/DFO8eKo4550/ISX DaMY1UJr6hbQVdytt7Tyk8Mc7zodrikuxnj7TFTE9GtLbl0l1sFfaPt+ICZv/DP2YcFS v1vzCnSAJdt7n3zxRpn2EuMxCVtquYPcklPKIskkVvCCOyBdMsGLKDdFCVIQZMPhW6VN ZbD961kjOM1b92+XmBFQFjvg6G3whzpBVXaBf40gpKFdNLGmHFkNNYX5A2sxzWTJxZhq quEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0rt5ptZqBEHrkMiBf374pai7VKaOzXWnlK2r/Lyekjk=; b=Jy4cC72ziBUthvLuK/UREH51hAR5MULt1He6sjyuLOL9rwWa66KyO4V6qp0krqjWve JebB3RgVlvtAk6RehkN48XyNrgrzdo9UPsCOgo/XjZFCYptVIEJF8uKzRI5YDrKa5fWX eSS+fLLveVJxE0MtM3z1IReONja2moFlZotiJyLgtJ4xocP3eUhmuhTYLiXS2SCe33cV bbDrgzIzw5jJ5mPpk7H2gPjyXdSjJwuMA47RSjxIM+a+qO3E/uQwf05miMfn0jmH5O6M KlNpx6poethTUw33VdLcrVw821qR/CZw2CgqYSbUJLVhRekqyFSFh/0Y6W1DJymbr1FA z2+A== X-Gm-Message-State: ABUngvcuWn7xWfLUUiqrNEBRrfbauHO1cFHEuSUzx6u6imubQ2k32ABu5l2R05r5joPLSOh0 X-Received: by 10.28.211.132 with SMTP id k126mr6401235wmg.66.1478523931758; Mon, 07 Nov 2016 05:05:31 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id y2sm30933952wjx.20.2016.11.07.05.05.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 07 Nov 2016 05:05:31 -0800 (PST) From: Alexandre Bailon To: david@lechnology.com, b-liu@ti.com, balbi@kernel.org Cc: kishon@ti.com, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, nsekhar@ti.com, Alexandre Bailon Subject: [PATCH v5 1/4] usb: musb: da8xx: Call earlier clk_prepare_enable() Date: Mon, 7 Nov 2016 14:05:05 +0100 Message-Id: <1478523908-4383-2-git-send-email-abailon@baylibre.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1478523908-4383-1-git-send-email-abailon@baylibre.com> References: <1478523908-4383-1-git-send-email-abailon@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The first attempt to read a register may fail because the clock may not be enabled, and then the probe of musb driver will fail. Call clk_prepare_enable() before the first register read. Signed-off-by: Alexandre Bailon --- drivers/usb/musb/da8xx.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) -- 2.7.3 diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c index 210b7e4..6749aa1 100644 --- a/drivers/usb/musb/da8xx.c +++ b/drivers/usb/musb/da8xx.c @@ -366,6 +366,12 @@ static int da8xx_musb_init(struct musb *musb) musb->mregs += DA8XX_MENTOR_CORE_OFFSET; + ret = clk_prepare_enable(glue->clk); + if (ret) { + dev_err(glue->dev, "failed to enable clock\n"); + return ret; + } + /* Returns zero if e.g. not clocked */ rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG); if (!rev) @@ -377,12 +383,6 @@ static int da8xx_musb_init(struct musb *musb) goto fail; } - ret = clk_prepare_enable(glue->clk); - if (ret) { - dev_err(glue->dev, "failed to enable clock\n"); - goto fail; - } - setup_timer(&otg_workaround, otg_timer, (unsigned long)musb); /* Reset the controller */ @@ -392,7 +392,7 @@ static int da8xx_musb_init(struct musb *musb) ret = phy_init(glue->phy); if (ret) { dev_err(glue->dev, "Failed to init phy.\n"); - goto err_phy_init; + goto fail; } ret = phy_power_on(glue->phy); @@ -412,9 +412,8 @@ static int da8xx_musb_init(struct musb *musb) err_phy_power_on: phy_exit(glue->phy); -err_phy_init: - clk_disable_unprepare(glue->clk); fail: + clk_disable_unprepare(glue->clk); return ret; }