From patchwork Fri Jan 13 16:03:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 91464 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp259234qgi; Fri, 13 Jan 2017 08:05:28 -0800 (PST) X-Received: by 10.98.36.134 with SMTP id k6mr23377988pfk.41.1484323528561; Fri, 13 Jan 2017 08:05:28 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33si13117686pli.144.2017.01.13.08.05.28; Fri, 13 Jan 2017 08:05:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752229AbdAMQEa (ORCPT + 25 others); Fri, 13 Jan 2017 11:04:30 -0500 Received: from foss.arm.com ([217.140.101.70]:49256 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752016AbdAMQEN (ORCPT ); Fri, 13 Jan 2017 11:04:13 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6078A165D; Fri, 13 Jan 2017 08:04:12 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 33D583F7DA; Fri, 13 Jan 2017 08:04:12 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 2DA571AE3977; Fri, 13 Jan 2017 16:04:11 +0000 (GMT) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, mark.rutland@arm.com, kim.phillips@arm.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, tglx@linutronix.de, peterz@infradead.org, alexander.shishkin@linux.intel.com, robh@kernel.org, suzuki.poulose@arm.com, pawel.moll@arm.com, mathieu.poirier@linaro.org, mingo@redhat.com, linux-kernel@vger.kernel.org, Will Deacon Subject: [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding for ARM SPE Date: Fri, 13 Jan 2017 16:03:49 +0000 Message-Id: <1484323429-15231-11-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1484323429-15231-1-git-send-email-will.deacon@arm.com> References: <1484323429-15231-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch documents the devicetree binding in use for ARM SPE. Cc: Mark Rutland Cc: Rob Herring Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt -- 2.1.4 diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt new file mode 100644 index 000000000000..d6540b491af4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt @@ -0,0 +1,20 @@ +* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) + +ARMv8.2 introduces the optional Statistical Profiling Extension for collecting +performance sample data using an in-memory trace buffer. + +** SPE Required properties: + +- compatible : should be one of: + "arm,arm-spe-pmu-v1" + +- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where + SPE is only supported on a subset of the CPUs, please consult + the arm,gic-v3 binding for details on describing a PPI partition. + +** Example: + +spe-pmu { + compatible = "arm,arm-spe-pmu-v1"; + interrupts = ; +};