From patchwork Wed Jan 18 08:13:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 91733 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp903949qgi; Wed, 18 Jan 2017 00:22:56 -0800 (PST) X-Received: by 10.98.53.4 with SMTP id c4mr2366606pfa.45.1484727776409; Wed, 18 Jan 2017 00:22:56 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h88si27734026pfk.4.2017.01.18.00.22.56; Wed, 18 Jan 2017 00:22:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751157AbdARIWg (ORCPT + 25 others); Wed, 18 Jan 2017 03:22:36 -0500 Received: from mail-pf0-f177.google.com ([209.85.192.177]:34849 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751167AbdARIWe (ORCPT ); Wed, 18 Jan 2017 03:22:34 -0500 Received: by mail-pf0-f177.google.com with SMTP id f144so2653249pfa.2 for ; Wed, 18 Jan 2017 00:21:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id; bh=GrLa4RWlr1XqrnPK+GybcskjI5rIGE1WdZ+ZL0eOLxo=; b=assTPpEPqFrQGFdAbX2ZnJXReitXrj6tZs+TdBewziQSxDexBBTrbZiVV2dJHoa+ky hUhlPfZuJ6n7by0gmk/7Q0bQnDz1McnuPZsa2AhSHElbJEoY3SEohp5rnt+5sx9O8oYa hOL2X3dz5FWqGlOGoorOoYfr8Iv4Jf6U5qZsQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id; bh=GrLa4RWlr1XqrnPK+GybcskjI5rIGE1WdZ+ZL0eOLxo=; b=IeoWb3E1Bf7/FOpv7uE7sfNLC8bvhrvMwtVemqvBk5xiNZL7O+q56vN+rtn37485ei pZM6TQZxWGPoCGn2pFofFO+6Iq+LBRf40P6aLcJGD/qZFchH8fb01k5GjI85pgJYukGg ijGUgmMuBrpJjinC9OMalE5ODLWpAzOgzlgwKCmPGIFuk7HuC91pHTvVdPHv3ReZqfIL a/9HvMVbNPJ/Hg6LQHm/99XTVzkV5K6aBfiynFuA9B5CF0DM3kSG+drzoQs6P/nLQjev s3ILM1sTOgpEJ8o47pISyG8w2jWP4hUhPCD4x7jLINCRgyGxWXQSpo4z4DpImldbcJVQ pUOg== X-Gm-Message-State: AIkVDXLB9T4g+F3AAboqWaWBsVWb9vU6tXg0XeUSc19SeH/TUIiuSRIdi5WFGB7v/EaPvswU X-Received: by 10.98.192.72 with SMTP id x69mr2333419pff.129.1484727245984; Wed, 18 Jan 2017 00:14:05 -0800 (PST) Received: from localhost.localdomain ([103.192.224.50]) by smtp.gmail.com with ESMTPSA id u78sm61324910pfa.53.2017.01.18.00.13.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Jan 2017 00:14:04 -0800 (PST) From: Leo Yan To: Michael Turquette , Stephen Boyd , Leo Yan , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Haojian Zhuang , Guodong Xu , John Stultz Subject: [PATCH] clk: hisilicon: fix lock assignment Date: Wed, 18 Jan 2017 16:13:38 +0800 Message-Id: <1484727218-3499-1-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In clock driver initialize phase the spinlock is missed to assignment to struct clkgate_separated, finally there have no locking to protect exclusive accessing for clock registers. This bug introduces the console has no output after enable coresight driver on 96borads Hikey; this is because console using UART3, which has shared the same register with coresight clock enabling bit. After applied this patch it can assign lock properly to protect exclusive accessing, and console can work well after enabled coresight modules. Signed-off-by: Leo Yan --- drivers/clk/hisilicon/clkgate-separated.c | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/drivers/clk/hisilicon/clkgate-separated.c b/drivers/clk/hisilicon/clkgate-separated.c index a47812f..7908bc3 100644 --- a/drivers/clk/hisilicon/clkgate-separated.c +++ b/drivers/clk/hisilicon/clkgate-separated.c @@ -120,6 +120,7 @@ struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name, sclk->bit_idx = bit_idx; sclk->flags = clk_gate_flags; sclk->hw.init = &init; + sclk->lock = lock; clk = clk_register(dev, &sclk->hw); if (IS_ERR(clk))