From patchwork Thu Mar 9 06:39:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 95064 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp223764qgd; Wed, 8 Mar 2017 22:41:11 -0800 (PST) X-Received: by 10.99.229.5 with SMTP id r5mr11888205pgh.206.1489041671493; Wed, 08 Mar 2017 22:41:11 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t2si5525117pfl.148.2017.03.08.22.41.11; Wed, 08 Mar 2017 22:41:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752737AbdCIGki (ORCPT + 25 others); Thu, 9 Mar 2017 01:40:38 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:31346 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750793AbdCIGk0 (ORCPT ); Thu, 9 Mar 2017 01:40:26 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v296dLtK010815; Thu, 9 Mar 2017 00:39:21 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489041561; bh=HTcE7UsbYMIaUHk4mlUhG67yIfaO0bBMZ7BmMcotg7A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=G7gCmihmJOMHmoZaSg20aYwHHls2+C2loOPZGAtejUTWzh+3sxhIyeUd5xdflf4iO RAVtV+MRaREKMnjD2PiT4fTjz4EP8jumLDYGUTXAiO3wDB9LgmQoYdE3gAF8YJ9W4R AKQg0N9FxvQlA4zwYP4FXxsikPJGNzP0oDh/evSo= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v296dLmC000456; Thu, 9 Mar 2017 00:39:21 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Thu, 9 Mar 2017 00:39:20 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v296d9Os009609; Thu, 9 Mar 2017 00:39:18 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Joao Pinto , , , , CC: , , Niklas Cassel Subject: [RESEND PATCH v3 3/7] PCI: dwc: artpec6: Populate cpu_addr_fixup ops Date: Thu, 9 Mar 2017 12:09:01 +0530 Message-ID: <1489041545-15730-4-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489041545-15730-1-git-send-email-kishon@ti.com> References: <1489041545-15730-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Populate cpu_addr_fixup ops to extract the least 28 bits of the corresponding cpu address. Cc: Niklas Cassel Acked-by: Joao Pinto Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pcie-artpec6.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) -- 1.7.9.5 Acked-by: Niklas Cassel diff --git a/drivers/pci/dwc/pcie-artpec6.c b/drivers/pci/dwc/pcie-artpec6.c index fcd3ef8..5b3b3af 100644 --- a/drivers/pci/dwc/pcie-artpec6.c +++ b/drivers/pci/dwc/pcie-artpec6.c @@ -78,6 +78,11 @@ static void artpec6_pcie_writel(struct artpec6_pcie *artpec6_pcie, u32 offset, u regmap_write(artpec6_pcie->regmap, offset, val); } +static u64 artpec6_pcie_cpu_addr_fixup(u64 pci_addr) +{ + return pci_addr & ARTPEC6_CPU_TO_BUS_ADDR; +} + static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6_pcie) { struct dw_pcie *pci = artpec6_pcie->pci; @@ -142,11 +147,6 @@ static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6_pcie) */ dw_pcie_writel_dbi(pci, MISC_CONTROL_1_OFF, DBI_RO_WR_EN); - pp->io_base &= ARTPEC6_CPU_TO_BUS_ADDR; - pp->mem_base &= ARTPEC6_CPU_TO_BUS_ADDR; - pp->cfg0_base &= ARTPEC6_CPU_TO_BUS_ADDR; - pp->cfg1_base &= ARTPEC6_CPU_TO_BUS_ADDR; - /* setup root complex */ dw_pcie_setup_rc(pp); @@ -234,6 +234,10 @@ static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6_pcie, return 0; } +static const struct dw_pcie_ops dw_pcie_ops = { + .cpu_addr_fixup = artpec6_pcie_cpu_addr_fixup, +}; + static int artpec6_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -252,6 +256,7 @@ static int artpec6_pcie_probe(struct platform_device *pdev) return -ENOMEM; pci->dev = dev; + pci->ops = &dw_pcie_ops; artpec6_pcie->pci = pci;