From patchwork Tue Jun 13 05:04:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103703 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp236704qgd; Mon, 12 Jun 2017 22:09:35 -0700 (PDT) X-Received: by 10.99.44.68 with SMTP id s65mr50551478pgs.73.1497330574955; Mon, 12 Jun 2017 22:09:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497330574; cv=none; d=google.com; s=arc-20160816; b=fTSs166sgbDbCzPi1hZ5naw/HSX95k3SLZ4pCkPB/ShI2vdJRHbaJNb4Fonki1DNy6 D0PIafoPd8jhYWwWA8L6kCgv8+9rneed0DlKIuegXiTGyWX4Z79+fleSe3Ji5trglOMY uELxP6CpdWEniQZFl3sZqfT/TkM+S+x+I4JMB7w/IGPMvrxM5mAw8Ze9uWsdM3myu5+7 rPQNkY98w18lTy++JE7H7QGEPehaFht38Q/v1KEBMRwV1nH9BrfCOETwFyInmmpoJiY4 j6KR0VX3iZm6hzd1QEYwCgqD2kvtt7WeyVF6qOtFuHv6V6vmBtsVXs894RIpVvcbC0q4 GoCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=sY4q5YPzgAhvAPo40SABqIMnVg33E9VtBSEIn7mW++c=; b=gEyTWKX4NN2RJf9nIs7cSjnx89AmOwJyBm5P7go8vz/dtaF/waazQjnUlnRxQmUWuq G73O7OSkPBOa/pOZWnCsF1sThlSGbjWvz08EdLd3G5bw2I808p9J3wXYgLDJWsuCiA3Z 4IQqYKTXUc4hhxUJPjzndGHQ14cwH00tPovUZsqfLz8TrNHSs8JmcSgPfZ2wBl98fXfi gtPYhWuxLcF8ZPQSkyQ701Sed9vlR4KpcSCxOW74e4CTVmEQqITtrxnBlLGLMLJ9RN4P R1J/I3xSjiHnOrJqlprilPKRjoC9HlkEYdB4ATDm3jMMcNRZKIa3yj+VomKbXW9bNDxb kJAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n20si594026pgf.161.2017.06.12.22.09.34; Mon, 12 Jun 2017 22:09:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752488AbdFMFJc (ORCPT + 25 others); Tue, 13 Jun 2017 01:09:32 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:46767 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752187AbdFMFGy (ORCPT ); Tue, 13 Jun 2017 01:06:54 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id v5D54ENn023096; Tue, 13 Jun 2017 14:04:25 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v5D54ENn023096 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1497330266; bh=sY4q5YPzgAhvAPo40SABqIMnVg33E9VtBSEIn7mW++c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aQFfC39xooQnIzY5F2JLL81ADpoZyXrYq1ivqKe4yFmR6FmQ88oBBqChH7W3GFw9v STHUiHhJN5MWSOgUbaH77L7GgVUCgFm8Ks56Hwk9mdhcEwKQAhZ7qk9F1sCgcw9+FI zLjIXz3JswHfK96wvKYUsZ/02HLKvDHp6RdAEUiUGYEFDcis1AHK7tM2GUOOqlXzde YcyihEatO2+YhMFjznm0Eb8q9yAgTKBWjkUNHuW59z6L0TFQ2BuGbmmlVWS3dDxflb 2ekwQpfanUeuFfr5UtaHq7dP5CBLZxz+duwf6WjQ744w3V3+KZc0k2UlkydV+BVGXy gQpReAcW6um9A== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v6 09/18] mtd: nand: denali: use interrupt instead of polling for bank reset Date: Tue, 13 Jun 2017 14:04:01 +0900 Message-Id: <1497330250-17348-10-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497330250-17348-1-git-send-email-yamada.masahiro@socionext.com> References: <1497330250-17348-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current bank reset implementation polls the INTR_STATUS register until interested bits are set. This is not good because: - polling simply wastes time-slice of the thread - The while() loop may continue eternally if no bit is set, for example, due to the controller problem. The denali_wait_for_irq() uses wait_for_completion_timeout(), which is safer. We can use interrupt by moving the denali_reset_bank() call below the interrupt setup. Signed-off-by: Masahiro Yamada --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 61a2ee9fb367..7ae2fa65d601 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -973,24 +973,25 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, static void denali_reset_banks(struct denali_nand_info *denali) { + u32 irq_status; int i; - denali_clear_irq_all(denali); - for (i = 0; i < denali->max_banks; i++) { - iowrite32(1 << i, denali->flash_reg + DEVICE_RESET); - while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - (INTR__RST_COMP | INTR__TIME_OUT))) - cpu_relax(); - if (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - INTR__INT_ACT)) + denali->flash_bank = i; + + denali_reset_irq(denali); + + iowrite32(DEVICE_RESET__BANK(i), + denali->flash_reg + DEVICE_RESET); + + irq_status = denali_wait_for_irq(denali, + INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT); + if (!(irq_status & INTR__INT_ACT)) break; } dev_dbg(denali->dev, "%d chips connected\n", i); denali->max_banks = i; - - denali_clear_irq_all(denali); } static void denali_hw_init(struct denali_nand_info *denali) @@ -1012,7 +1013,6 @@ static void denali_hw_init(struct denali_nand_info *denali) denali->bbtskipbytes = ioread32(denali->flash_reg + SPARE_AREA_SKIP_BYTES); detect_max_banks(denali); - denali_reset_banks(denali); iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED); iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->flash_reg + CHIP_ENABLE_DONT_CARE); @@ -1130,9 +1130,6 @@ static void denali_drv_init(struct denali_nand_info *denali) * element that might be access shared data (interrupt status) */ spin_lock_init(&denali->irq_lock); - - /* indicate that MTD has not selected a valid bank yet */ - denali->flash_bank = CHIP_SELECT_INVALID; } static int denali_multidev_fixup(struct denali_nand_info *denali) @@ -1207,6 +1204,9 @@ int denali_init(struct denali_nand_info *denali) } denali_enable_irq(denali); + denali_reset_banks(denali); + + denali->flash_bank = CHIP_SELECT_INVALID; nand_set_flash_node(chip, denali->dev->of_node); /* Fallback to the default name if DT did not give "label" property */