From patchwork Tue Oct 24 15:51:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 116971 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp5918491qgn; Tue, 24 Oct 2017 08:10:31 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QzhS2SaPYLpwUFd5a0qb9B0GnwJL8Qkcn8LXuyNhPAxTZXuTo853B4L2/9CFeMxCnjgD50 X-Received: by 10.159.254.14 with SMTP id r14mr7614338pls.72.1508857831881; Tue, 24 Oct 2017 08:10:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508857831; cv=none; d=google.com; s=arc-20160816; b=GUFL2W1kV5T0e5yTr0KZqDzPdhPSclXy7isCMb0ykRrSXqYMHYnKmG2Ixp5czOw0k7 RRqra6Xu3Fvm1JG1+I2VAxM9M0+Vlm5Ko2LARiqMUwoqTrG1cj9QQwzuHSFZ6ZLSXqOj QoagPQTaOuUbrNCdqJAAufSVtKRQVjq/pW8ONFGvZy5L528pLC9tQ5mGlOCOcEP81ju+ ffj2RDx8m+dcFLn+pw7IB5CQL/+h+Drjocw7RRX6B2OjP+FI5/nBCx/iFP3xvirozly/ fvypbFAABeycnGTwN11JOMi15pdRuwU/yzjI+t5/lM2gTr9J5Qd0JddQb0cuiw3rW6Xj 97kQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=qu95AVB43JmYiBCCXNfPJZsA6S/psYE7FZGgcDvCaU4=; b=Lfo2WaV+n5dnSZapvg3L9lkkrPQvKG01ECbWG2zyLAy9N6u1hI+lU/cQ9nrRH77G6z BeGvWuPXcSa8NJhgju8tV/Ls0irRQ1ZAH06QicXzFyOnKfVNum8xsNAN/avAp5ohd40g ICx5DbRI1qwYkZC1XXWUsFP36TlAxyJK0rCo9cIMKXxksGSyRP+1bdh982WQ8eNXQrTE k5RUC2yKttqM/gXXemhmyiQg06u7twTsYfya/V7RJMlQFYAOqj8KEdY+zF3vIwCTeEZP vE0k7DfNipfF1q1uST/zCvUSuezMOs9Xjodsa6RtNjitcfRNJJTE7MpGdcm6AmwYLeou 5T1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bd7si263577plb.694.2017.10.24.08.10.31; Tue, 24 Oct 2017 08:10:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932345AbdJXPK2 (ORCPT + 27 others); Tue, 24 Oct 2017 11:10:28 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:9040 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751682AbdJXPIu (ORCPT ); Tue, 24 Oct 2017 11:08:50 -0400 Received: from 172.30.72.58 (EHLO DGGEMS406-HUB.china.huawei.com) ([172.30.72.58]) by dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DJW29918; Tue, 24 Oct 2017 23:05:29 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.361.1; Tue, 24 Oct 2017 23:05:19 +0800 From: John Garry To: , CC: , , , , Xiaofei Tan , John Garry Subject: [PATCH 12/19] scsi: hisi_sas: check PHY state in get_wideport_bitmap_v3_hw() Date: Tue, 24 Oct 2017 23:51:42 +0800 Message-ID: <1508860309-212397-13-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508860309-212397-1-git-send-email-john.garry@huawei.com> References: <1508860309-212397-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A0B0204.59EF56BA.004C, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: a1442c8262fec7b2ef5d6bca430e909c Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xiaofei Tan We should check register PHY_STATE when getting the bitmap of a wideport, as, if the PHY is not ready, the value of register PHY_PORT_NUM_MA is not valid. V2 hw has done this check, and v3 hw should do this check too. Signed-off-by: Xiaofei Tan Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 1.9.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 67ebd8f..c88e787 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -755,10 +755,12 @@ static int get_wideport_bitmap_v3_hw(struct hisi_hba *hisi_hba, int port_id) { int i, bitmap = 0; u32 phy_port_num_ma = hisi_sas_read32(hisi_hba, PHY_PORT_NUM_MA); + u32 phy_state = hisi_sas_read32(hisi_hba, PHY_STATE); for (i = 0; i < hisi_hba->n_phy; i++) - if (((phy_port_num_ma >> (i * 4)) & 0xf) == port_id) - bitmap |= 1 << i; + if (phy_state & BIT(i)) + if (((phy_port_num_ma >> (i * 4)) & 0xf) == port_id) + bitmap |= BIT(i); return bitmap; }