From patchwork Wed Mar 7 12:25:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 130874 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp5121171lja; Wed, 7 Mar 2018 04:27:51 -0800 (PST) X-Google-Smtp-Source: AG47ELvq/pU1k3vc9PwyGE7YhlN3ORMiWWTbpbRCIpsHOMubMu9R4R9GF4Jbf1qrtnnX46RkYb4e X-Received: by 10.98.139.145 with SMTP id e17mr22422845pfl.53.1520425671702; Wed, 07 Mar 2018 04:27:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520425671; cv=none; d=google.com; s=arc-20160816; b=JqqVEbKzvohbDBtPQBusyTblsLmxCa+3NFeKskX7bk2ETeTFy3GjgkSdxT7+ZwRWB9 sdPR/qGOBHmgs2wSE8F8yU5WHz9NGQCNVz2Xm+6sHqatGdoDHkuggiQHSlsFQrACw1kD 1IiJXeIHeGPioZMJY5ufxyWnxmNDRiw8hpnKW1iBk2D9D0RiT2Gm4i5yay5pcw4HckY5 O6/7FiZKh0dIX1MPtbSKCN98LqXk5dteYjuXjRBgGecznwc6x7qdbgwxA3EKL9yAiCpH qGNS9jLhmzgSW0nTkwiKEH4jVJDeuTZRYPPJZlKAN5uL8p11SglrXMuznafPfo4NQyKb mUmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=FqriQ140nkxo59hIdG8aEpcq6yKA/ljZVY5d9PN5vyo=; b=MEtJx14xlhMtx2ZOBhroQYKaIN+kS/KgIKpLstQ/RRA270aGoBGb8xvSznCWoBqS3U yyKIMM7B8MeKl08QhhqxZkvY2N1hxSRYvazUD+2HukTtDYHJI2w51w28vIPkBAlR+V9x fmBBZqExR1or0HLgdmimTB43rhnaEB7+YytLcMroJNybQ5hGJYXvrXW5SRBHHItZfXEC rLcZL8GQBC2zf+k60e2UJvkzaGCPnLlblbCWJrTTxDCatAsGX4Czw8FG2hTEfQfpv1y5 8k6bddJMMBTlNqmQl/quvI5nXi9zrO3JN1wbW8635vI1EhmVHYqAcAJ6YWdqr2cHk7cV g1LA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q3si11317728pgp.701.2018.03.07.04.27.51; Wed, 07 Mar 2018 04:27:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754166AbeCGMZ7 (ORCPT + 28 others); Wed, 7 Mar 2018 07:25:59 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:6165 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751305AbeCGMZ5 (ORCPT ); Wed, 7 Mar 2018 07:25:57 -0500 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 9C782654048F5; Wed, 7 Mar 2018 20:25:42 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.361.1; Wed, 7 Mar 2018 20:25:35 +0800 From: John Garry To: , , , , CC: , , , , Xiaofei Tan , John Garry Subject: [PATCH v4 04/10] scsi: hisi_sas: fix the issue of setting linkrate register Date: Wed, 7 Mar 2018 20:25:08 +0800 Message-ID: <1520425514-205565-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520425514-205565-1-git-send-email-john.garry@huawei.com> References: <1520425514-205565-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xiaofei Tan It is not right to set the register PROG_PHY_LINK_RATE while PHY is still enabled. So if we want to change PHY linkrate, we need to disable PHY before setting the register PROG_PHY_LINK_RATE, and then start-up PHY. This patch is to fix this issue. Signed-off-by: Xiaofei Tan Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 5 +++-- drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 5 +++-- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 5 +++-- 3 files changed, 9 insertions(+), 6 deletions(-) -- 1.9.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c index 38bbda9..2eb8980 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c @@ -881,10 +881,11 @@ static void phy_set_linkrate_v1_hw(struct hisi_hba *hisi_hba, int phy_no, prog_phy_link_rate &= ~0xff; prog_phy_link_rate |= rate_mask; + disable_phy_v1_hw(hisi_hba, phy_no); + msleep(100); hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, prog_phy_link_rate); - - phy_hard_reset_v1_hw(hisi_hba, phy_no); + start_phy_v1_hw(hisi_hba, phy_no); } static int get_wideport_bitmap_v1_hw(struct hisi_hba *hisi_hba, int port_id) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index 67be346..bd1a48a 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -1611,10 +1611,11 @@ static void phy_set_linkrate_v2_hw(struct hisi_hba *hisi_hba, int phy_no, prog_phy_link_rate &= ~0xff; prog_phy_link_rate |= rate_mask; + disable_phy_v2_hw(hisi_hba, phy_no); + msleep(100); hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, prog_phy_link_rate); - - phy_hard_reset_v2_hw(hisi_hba, phy_no); + start_phy_v2_hw(hisi_hba, phy_no); } static int get_wideport_bitmap_v2_hw(struct hisi_hba *hisi_hba, int port_id) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 1ee95ab..8da9de7 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -1862,10 +1862,11 @@ static void phy_set_linkrate_v3_hw(struct hisi_hba *hisi_hba, int phy_no, prog_phy_link_rate &= ~0xff; prog_phy_link_rate |= rate_mask; + disable_phy_v3_hw(hisi_hba, phy_no); + msleep(100); hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, prog_phy_link_rate); - - phy_hard_reset_v3_hw(hisi_hba, phy_no); + start_phy_v3_hw(hisi_hba, phy_no); } static void interrupt_disable_v3_hw(struct hisi_hba *hisi_hba)