From patchwork Thu Oct 10 18:44:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 175821 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2683449ill; Thu, 10 Oct 2019 11:45:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqzHCBIB/LhZILOKHoUPJqlC4mnU84gjL8/ZNMJDa/Hb9LTWwG+VCm+ONIhuAgy1LuJcojKM X-Received: by 2002:aa7:c616:: with SMTP id h22mr9515427edq.296.1570733157674; Thu, 10 Oct 2019 11:45:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570733157; cv=none; d=google.com; s=arc-20160816; b=pOhxjHVsLIZS194XKGXEc/YU7VM7X+J9uXpBNL6SxQirmJFtU0FTzZNfIpGGhkxT7n Nsvt3zkhYF+ZHeu8EGlCLvurl+XMf3YSyNPl1KzKRA9gNhjXJHdTryKz835uSaFRQ6WT T4CX4cSb9TD4zEXhfIw+lM2GNp3Tu0o12YHvb30e4ZBMIvUX39hl/pIyJiAQhVFb6xzI qv467zOSkIKCbZDLRMOCsGA9QYJkrFlt4kIyyqUCQ1VJqnuwzG9HDahVQMepCb33I8HQ 1IF2tvjnMYVhZuNf+9ZrWi/ift7zonsX7z5uRHd1hb6jvYYaGYlwYgOF/WeQQv2lEvGp /Aqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=dX0FhfY2Bn/munj/bY+NzRBCF89t1hAIfUJp783Ipzo=; b=vy6FFDYskjoxxV0fNJ0+URg2/i5bVo7OCefyLHKv5ATilGKLvhq2tqB8cyViYx/0Ay y/Tz+GBjNjA5h9Q9Vp7KRaP5U4zoEUNxSw8ijT+JLJmt2ATOqlf1fMhW7AKB32FhRv+w /7ZNEVXj+mKO0If4iKQsNtWOESjast4TmdGSPAd31eZxU3irr5M62Hzfg59TnukYS8/5 BozUtQCPKspSmYTtntYfvYVnoXXhEfOSywBTpu73bXNNH02YKbtg7vJ9jXYrFMg3Xjqa xv4ajbVleNfpFmVoESborWaWQH2zbBdCn3gOD1vBMy7aZ5XmPXB4CjBLBiQtxfIpYavk 4lxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d25si3473579edv.319.2019.10.10.11.45.57; Thu, 10 Oct 2019 11:45:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727264AbfJJSp4 (ORCPT + 22 others); Thu, 10 Oct 2019 14:45:56 -0400 Received: from foss.arm.com ([217.140.110.172]:38488 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727247AbfJJSpy (ORCPT ); Thu, 10 Oct 2019 14:45:54 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2CDD71000; Thu, 10 Oct 2019 11:45:53 -0700 (PDT) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7D5CB3F703; Thu, 10 Oct 2019 11:45:50 -0700 (PDT) From: Dave Martin To: linux-kernel@vger.kernel.org Cc: Andrew Jones , Arnd Bergmann , Catalin Marinas , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Kees Cook , =?utf-8?q?Kristina_Mart=C5=A1enko?= , Mark Brown , Paul Elliott , Peter Zijlstra , Richard Henderson , Sudakshina Das , Szabolcs Nagy , Thomas Gleixner , Will Deacon , Yu-cheng Yu , Amit Kachhap , Vincenzo Frascino , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 08/12] arm64: BTI: Decode BYTPE bits when printing PSTATE Date: Thu, 10 Oct 2019 19:44:36 +0100 Message-Id: <1570733080-21015-9-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1570733080-21015-1-git-send-email-Dave.Martin@arm.com> References: <1570733080-21015-1-git-send-email-Dave.Martin@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current code to print PSTATE symbolically when generating backtraces etc., does not include the BYTPE field used by Branch Target Identification. So, decode BYTPE and print it too. In the interests of human-readability, print the classes of BTI matched. The symbolic notation, BYTPE (PSTATE[11:10]) and permitted classes of subsequent instruction are: -- (BTYPE=0b00): any insn jc (BTYPE=0b01): BTI jc, BTI j, BTI c, PACIxSP -c (BYTPE=0b10): BTI jc, BTI c, PACIxSP j- (BTYPE=0b11): BTI jc, BTI j Signed-off-by: Dave Martin --- Changes since v1: * Add convenience definitions for all the BTYPE codes, even if we don't directly use them all yet. * For consistency, align PSR_BTYPE_foo names with the above print format: PSR_BTYPE_NONE -> -- (BTYPE=0b00) PSR_BTYPE_JC -> jc (BTYPE=0b01) etc. --- arch/arm64/include/asm/ptrace.h | 7 ++++++- arch/arm64/kernel/process.c | 17 +++++++++++++++-- arch/arm64/kernel/signal.c | 2 +- 3 files changed, 22 insertions(+), 4 deletions(-) -- 2.1.4 diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index 7d4cd59..212bba1 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -38,7 +38,12 @@ #define PSR_BTYPE_SHIFT 10 #define PSR_IL_BIT (1 << 20) -#define PSR_BTYPE_CALL (2 << PSR_BTYPE_SHIFT) + +/* Convenience names for the values of PSTATE.BTYPE */ +#define PSR_BTYPE_NONE (0b00 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_JC (0b01 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_C (0b10 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_J (0b11 << PSR_BTYPE_SHIFT) /* AArch32-specific ptrace requests */ #define COMPAT_PTRACE_GETREGS 12 diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 4c78937..a2b555a 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -209,6 +209,15 @@ void machine_restart(char *cmd) while (1); } +#define bstr(suffix, str) [PSR_BTYPE_ ## suffix >> PSR_BTYPE_SHIFT] = str +static const char *const btypes[] = { + bstr(NONE, "--"), + bstr( JC, "jc"), + bstr( C, "-c"), + bstr( J , "j-") +}; +#undef bstr + static void print_pstate(struct pt_regs *regs) { u64 pstate = regs->pstate; @@ -227,7 +236,10 @@ static void print_pstate(struct pt_regs *regs) pstate & PSR_AA32_I_BIT ? 'I' : 'i', pstate & PSR_AA32_F_BIT ? 'F' : 'f'); } else { - printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO)\n", + const char *btype_str = btypes[(pstate & PSR_BTYPE_MASK) >> + PSR_BTYPE_SHIFT]; + + printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO BTYPE=%s)\n", pstate, pstate & PSR_N_BIT ? 'N' : 'n', pstate & PSR_Z_BIT ? 'Z' : 'z', @@ -238,7 +250,8 @@ static void print_pstate(struct pt_regs *regs) pstate & PSR_I_BIT ? 'I' : 'i', pstate & PSR_F_BIT ? 'F' : 'f', pstate & PSR_PAN_BIT ? '+' : '-', - pstate & PSR_UAO_BIT ? '+' : '-'); + pstate & PSR_UAO_BIT ? '+' : '-', + btype_str); } } diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 4a3bd32..452ac5b 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -732,7 +732,7 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka, if (system_supports_bti()) { regs->pstate &= ~PSR_BTYPE_MASK; - regs->pstate |= PSR_BTYPE_CALL; + regs->pstate |= PSR_BTYPE_C; } if (ka->sa.sa_flags & SA_RESTORER)