From patchwork Thu May 19 13:18:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 68126 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp3198703qge; Thu, 19 May 2016 06:18:40 -0700 (PDT) X-Received: by 10.98.67.150 with SMTP id l22mr19608049pfi.85.1463663920532; Thu, 19 May 2016 06:18:40 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m29si20055610pfa.173.2016.05.19.06.18.40; Thu, 19 May 2016 06:18:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754594AbcESNSi (ORCPT + 29 others); Thu, 19 May 2016 09:18:38 -0400 Received: from foss.arm.com ([217.140.101.70]:35013 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753942AbcESNSh (ORCPT ); Thu, 19 May 2016 09:18:37 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C5992F; Thu, 19 May 2016 06:18:55 -0700 (PDT) Received: from e104818-lin.cambridge.arm.com (e104818-lin.cambridge.arm.com [10.1.203.148]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2C5B83F213; Thu, 19 May 2016 06:18:35 -0700 (PDT) Date: Thu, 19 May 2016 14:18:32 +0100 From: Catalin Marinas To: "Xiaqing (A)" Cc: Mark Rutland , linaro-kernel@lists.linaro.org, puck.chen@hisilicon.com, suzhuangluan@hisilicon.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] arm64: cpuinfo: add AArch64 & elf platform for app compatibility Message-ID: <20160519131832.GO22378@e104818-lin.cambridge.arm.com> References: <1463625873-60016-1-git-send-email-saberlily.xia@hisilicon.com> <20160519104925.GL22378@e104818-lin.cambridge.arm.com> <573D9E40.4000705@hisilicon.com> <20160519125039.GN22378@e104818-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20160519125039.GN22378@e104818-lin.cambridge.arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 19, 2016 at 01:50:40PM +0100, Catalin Marinas wrote: > On Thu, May 19, 2016 at 07:06:40PM +0800, Xiaqing (A) wrote: > > > > > > 在 2016/5/19 18:49, Catalin Marinas 写道: > > >On Thu, May 19, 2016 at 10:44:33AM +0800, x00195127 wrote: > > >>we find that some apps will read cpuinfo when start up, > > >>they need the string as follows: > > >>"Processor : AArch64 Processor rev 0 (aarch64)" > > >> > > >>Then thay could load the corresponding libs. But now > > >>arm64 platform's cpuinfo don't has this now, so > > >>we need add this. > > > > > >I have the same question as Martinez: what are those apps? If they are > > >64-bit apps, they can always assume AArch64 processor. > > > > Those are 32-bit apps, and those apps are very popular in our country. > > 32-bit apps checking for "AArch64" is a really silly idea. What do they > do with this information? > > I'm rather inclined to merge this patch: > > diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c > index 3808470486f3..623d7d291dd6 100644 > --- a/arch/arm64/kernel/cpuinfo.c > +++ b/arch/arm64/kernel/cpuinfo.c > @@ -127,7 +127,8 @@ static int c_show(struct seq_file *m, void *v) > * software which does already (at least for 32-bit). > */ > seq_puts(m, "Features\t:"); > - if (personality(current->personality) == PER_LINUX32) { > + if (is_compat_task() || > + personality(current->personality) == PER_LINUX32) { > #ifdef CONFIG_COMPAT > for (j = 0; compat_hwcap_str[j]; j++) > if (compat_elf_hwcap & (1 << j)) To make it even more in line with the AArch32 kernel, let's add the "model name": ------------------8<--------------------- ------------------8<--------------------- With the above, a compat task or a native one with PER_LINUX32 personality would get: processor : 0 model name : ARMv8 Processor rev 0 (v8l) BogoMIPS : 100.00 Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd03 CPU revision : 0 -- Catalin diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 3808470486f3..6bda9d30a769 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -22,6 +22,7 @@ #include #include +#include #include #include #include @@ -104,6 +105,8 @@ static const char *const compat_hwcap2_str[] = { static int c_show(struct seq_file *m, void *v) { int i, j; + bool compat = is_compat_task() || + personality(current->personality) == PER_LINUX32; for_each_online_cpu(i) { struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i); @@ -115,6 +118,9 @@ static int c_show(struct seq_file *m, void *v) * "processor". Give glibc what it expects. */ seq_printf(m, "processor\t: %d\n", i); + if (compat) + seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n", + MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); seq_printf(m, "BogoMIPS\t: %lu.%02lu\n", loops_per_jiffy / (500000UL/HZ), @@ -127,7 +133,7 @@ static int c_show(struct seq_file *m, void *v) * software which does already (at least for 32-bit). */ seq_puts(m, "Features\t:"); - if (personality(current->personality) == PER_LINUX32) { + if (compat) { #ifdef CONFIG_COMPAT for (j = 0; compat_hwcap_str[j]; j++) if (compat_elf_hwcap & (1 << j))