From patchwork Thu Sep 8 09:11:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 75737 Delivered-To: patch@linaro.org Received: by 10.140.106.11 with SMTP id d11csp738209qgf; Thu, 8 Sep 2016 02:12:48 -0700 (PDT) X-Received: by 10.66.26.113 with SMTP id k17mr15395466pag.100.1473325968803; Thu, 08 Sep 2016 02:12:48 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 19si46196839pft.165.2016.09.08.02.12.46; Thu, 08 Sep 2016 02:12:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965470AbcIHJMo (ORCPT + 27 others); Thu, 8 Sep 2016 05:12:44 -0400 Received: from mail-wm0-f45.google.com ([74.125.82.45]:32813 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753222AbcIHJME (ORCPT ); Thu, 8 Sep 2016 05:12:04 -0400 Received: by mail-wm0-f45.google.com with SMTP id w12so3681297wmf.0 for ; Thu, 08 Sep 2016 02:12:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XS/EvSVfmaoSF7A65c+Se/PHyAX4u/axEkGwesMSURg=; b=SQbHRxx9ScXLm8qk4u14wYQCJhmOHj5fkcqZlE2BiZ+aBSl/fxsLSruVBeuJbXKF4s U+kYH86A0gj8Mu7lPhSx0HdoT0uTTh/O1LXYmi54QlA7vhaC6EjvGfe9BaItVzJ0hY+T B1POYRqAOgqDoi4xU+Y+CdycmvmAf75fygZrE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XS/EvSVfmaoSF7A65c+Se/PHyAX4u/axEkGwesMSURg=; b=ZjTSKQsz3HlatOWvW+574Bho2ZIIZwwacX2aXq6pBeW9PBHQwbfKbbxP5SkGv9qlKx HmZ8pUxJTYkh98/BjIt8t74TVtbqE3GrLqvQf4l73MlynhcA1ey0j8JUVd5JqhoPOctz zR5fWIJrEoK8RPUvUUmoSSwfFWz7DHtT2ZwF++IwDcWdSkZqK4smyfjjO+seQK/PGcYI huH3T9BJVQQjSo+lrDkPBlw0XdNDjAOhXjbL08qVFaA/AVXudnTxW+1kpqt3t8mSzVRD P2wvR3P1EH0cbnjbXN7BJ53Z70xuzT6jUMEhkyrn7mK9yAw6Pldr4OFj17qVY1nDbCUn LLQA== X-Gm-Message-State: AE9vXwM3seXB6ZQ1eBpdyddYj9vWzGCPF5UimVpqDyM559n3a1wwkoUYxadGh5ZBTvxvjALg X-Received: by 10.194.141.13 with SMTP id rk13mr9293480wjb.25.1473325922928; Thu, 08 Sep 2016 02:12:02 -0700 (PDT) Received: from localhost.localdomain ([217.46.108.207]) by smtp.gmail.com with ESMTPSA id yj3sm27535005wjb.43.2016.09.08.02.12.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Sep 2016 02:12:02 -0700 (PDT) From: Lee Jones To: ulf.hansson@linaro.org, patrice.chotard@st.com, peter.griffin@linaro.org, robh@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@stlinux.com, Lee Jones Subject: [PATCH 3/4] dt-bindings: mmc: sdhci-st: Mention the discretionary "icn" clock Date: Thu, 8 Sep 2016 10:11:35 +0100 Message-Id: <20160908091136.17301-4-lee.jones@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160908091136.17301-1-lee.jones@linaro.org> References: <20160908091136.17301-1-lee.jones@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The interconnect (ICN) clock is required for functional working of MMC on some ST platforms. When not supplied it can result in broken MMC and the following output: [ 13.916949] mmc0: Timeout waiting for hardware interrupt. [ 13.922349] sdhci: =========== REGISTER DUMP (mmc0)=========== [ 13.928175] sdhci: Sys addr: 0x00000000 | Version: 0x00001002 [ 13.933999] sdhci: Blk size: 0x00007040 | Blk cnt: 0x00000001 [ 13.939825] sdhci: Argument: 0x00fffff0 | Trn mode: 0x00000013 [ 13.945650] sdhci: Present: 0x1fff0206 | Host ctl: 0x00000011 [ 13.951475] sdhci: Power: 0x0000000f | Blk gap: 0x00000080 [ 13.957300] sdhci: Wake-up: 0x00000000 | Clock: 0x00003f07 [ 13.963126] sdhci: Timeout: 0x00000004 | Int stat: 0x00000000 [ 13.968952] sdhci: Int enab: 0x02ff008b | Sig enab: 0x02ff008b [ 13.974777] sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000 [ 13.980602] sdhci: Caps: 0x21ed3281 | Caps_1: 0x00000000 [ 13.986428] sdhci: Cmd: 0x0000063a | Max curr: 0x00000000 [ 13.992252] sdhci: Host ctl2: 0x00000000 [ 13.996166] sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x7c048200 [ 14.001990] sdhci: =========================================== [ 14.009802] mmc0: Got data interrupt 0x02000000 even though no data operation was in progress. Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mmc/sdhci-st.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.9.3 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-st.txt b/Documentation/devicetree/bindings/mmc/sdhci-st.txt index 88faa91..3cd4c43 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-st.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-st.txt @@ -10,7 +10,7 @@ Required properties: subsystem (mmcss) inside the FlashSS (available in STiH407 SoC family). -- clock-names: Should be "mmc". +- clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory) See: Documentation/devicetree/bindings/resource-names.txt - clocks: Phandle to the clock. See: Documentation/devicetree/bindings/clock/clock-bindings.txt