From patchwork Wed May 17 14:05:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 99976 Delivered-To: patch@linaro.org Received: by 10.182.142.97 with SMTP id rv1csp230023obb; Wed, 17 May 2017 07:07:13 -0700 (PDT) X-Received: by 10.98.130.1 with SMTP id w1mr4045020pfd.128.1495030033119; Wed, 17 May 2017 07:07:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495030033; cv=none; d=google.com; s=arc-20160816; b=lu1HJw+FGqvBw3Q7qGUVMwxrdmd5K2A7ty3Pl3AqaewOO3ycsZ/DPkkPuj7H+sadlC UJqF64bRLqbuBnJKgjHo7RTNTnLjrjPV/Yzg6ce6AB3mONrqkJSGNvK5SApQ7lwBkAQf TN+a3A88q2g1jKnJoHrSfdDPo5PuaMu9/M+6yjDgwH1FqVnH24X40lsnC1zhjNWnmHOl X/EldUdy/8NMkK9ORybAapRbaLN1U6HhHveTMU1bv4auW44XYl+UaPAh026uSdDZH2dM fXwhdtT2pfIpbKKyYM/fiTbK0FY1YscnpgPYKRJiJFs8v4+iWE16g+MY37tWLfxXWphK TvSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=glevUmQuRzMh+aaijkJOM2IevnqCvgqma/IQXtFngAk=; b=mQSShke3b80DRBZqpUnl7NCiRbxrYBPti+6kfTmipl2K9zkp/h5U0LK4lXjJjzQy1h JXKswsPAq2y4EnB29kSfDXDEJOto92txu3pElRa/72FaI9ApsBbxS4VWb+qLhpHv4fqN ZXfCbJqXow55lmWfNtQNgzby/jegUbPKqv7e0r+XN2cAIVbrNquHMi4cS/l616yABJxq Yoq8knsk+OZFdnY379n61nCMS+wcn7vNk2u2qsIpihYKzCJszBACGowFeGU1M6GsO4J8 Oj2FCkErnk51K+JaOd7v77S7u5e7Nxj04FsfZbsnlu2mPPTtT2coOtAaDMHN17snOvSP FuUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b5si2193574pfc.53.2017.05.17.07.07.12; Wed, 17 May 2017 07:07:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754613AbdEQOGq (ORCPT + 25 others); Wed, 17 May 2017 10:06:46 -0400 Received: from mail-wm0-f53.google.com ([74.125.82.53]:34702 "EHLO mail-wm0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753874AbdEQOGj (ORCPT ); Wed, 17 May 2017 10:06:39 -0400 Received: by mail-wm0-f53.google.com with SMTP id 70so2830684wmq.1 for ; Wed, 17 May 2017 07:06:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=glevUmQuRzMh+aaijkJOM2IevnqCvgqma/IQXtFngAk=; b=kdGAnUxZJoNk7dRjJUURipAMjBHBXDTMGgLB+VyhzHILopwK+TT+X8aa+fvlaLlV4w KQjO8R0GSh+0R7eyYrTsSA8giW2V4nKsClulg9iEWX9amyRzEQPdLZgkGfGua9vmCnod iVMnhh7TDsODO8CvxmIQcrZlIbQcLkKokc9RQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=glevUmQuRzMh+aaijkJOM2IevnqCvgqma/IQXtFngAk=; b=BXSGQvoaWejgJmmX9wU3gAqCvE81iiyLBT+PtiU0/q5h5hT0J4ZaifFiINQuh9IrnQ glC3CLAodDfE/FGNIDIPlInLbAPkpnUfmZqocTFR/eBZ+WakiMgaFR6Yx0QqqOyV423i p8BIvwNA7Fwr8bUIhhXQYlc4E4LNoaf3GRBjNGrqWEd2JzMAfckKq2OJc+X0WS1t4fPC aabUYPzOAbxyQAS5vrbELaXtT7MDfOMRN8TlJqr8tmbV1iL6YgLFbtB8FRHsUoEHBguG 2kOlsIUwbB3bzdEq9dzRsAofq5j6lnNAWCoEntrkcpVGNrMrRS+lQH6Lq5cQzdonLxPg /Zqg== X-Gm-Message-State: AODbwcA98xB9y4X+N3ndTLVcI+pnhLLpMl3kh9pp3PDEsapuG4OMlSjn RDWXK6Beu7SlVVZb X-Received: by 10.25.19.85 with SMTP id j82mr985352lfi.16.1495029997997; Wed, 17 May 2017 07:06:37 -0700 (PDT) Received: from fabina.bredbandsbolaget.se (c-3c94db54.014-348-6c756e10.cust.bredbandsbolaget.se. [84.219.148.60]) by smtp.gmail.com with ESMTPSA id 139sm409680ljj.16.2017.05.17.07.06.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 May 2017 07:06:36 -0700 (PDT) From: Linus Walleij To: Daniel Lezcano , Thomas Gleixner , Joel Stanley , Jonas Jensen Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli , linux-kernel@vger.kernel.org, Linus Walleij Subject: [PATCH 3/8] clocksource/drivers/fttmr010: Drop Gemini specifics Date: Wed, 17 May 2017 16:05:37 +0200 Message-Id: <20170517140542.20016-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170517140542.20016-1-linus.walleij@linaro.org> References: <20170517140542.20016-1-linus.walleij@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Gemini now has a proper clock driver and a proper PCLK assigned in its device tree. Drop the Gemini-specific hacks to look up the system speed and rely on the clock framework like everyone else. Cc: Joel Stanley Cc: Jonas Jensen Signed-off-by: Linus Walleij --- drivers/clocksource/timer-fttmr010.c | 103 ++++++++--------------------------- 1 file changed, 22 insertions(+), 81 deletions(-) -- 2.9.3 diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c index 58ce017e4a65..db097db346e3 100644 --- a/drivers/clocksource/timer-fttmr010.c +++ b/drivers/clocksource/timer-fttmr010.c @@ -11,8 +11,6 @@ #include #include #include -#include -#include #include #include #include @@ -179,9 +177,28 @@ static struct irqaction fttmr010_timer_irq = { .handler = fttmr010_timer_interrupt, }; -static int __init fttmr010_timer_common_init(struct device_node *np) +static int __init fttmr010_timer_init(struct device_node *np) { int irq; + struct clk *clk; + int ret; + + /* + * These implementations require a clock reference. + * FIXME: we currently only support clocking using PCLK + * and using EXTCLK is not supported in the driver. + */ + clk = of_clk_get_by_name(np, "PCLK"); + if (IS_ERR(clk)) { + pr_err("could not get PCLK\n"); + return PTR_ERR(clk); + } + ret = clk_prepare_enable(clk); + if (ret) { + pr_err("failed to enable PCLK\n"); + return ret; + } + tick_rate = clk_get_rate(clk); base = of_iomap(np, 0); if (!base) { @@ -229,81 +246,5 @@ static int __init fttmr010_timer_common_init(struct device_node *np) return 0; } - -static int __init fttmr010_timer_of_init(struct device_node *np) -{ - /* - * These implementations require a clock reference. - * FIXME: we currently only support clocking using PCLK - * and using EXTCLK is not supported in the driver. - */ - struct clk *clk; - int ret; - - clk = of_clk_get_by_name(np, "PCLK"); - if (IS_ERR(clk)) { - pr_err("could not get PCLK\n"); - return PTR_ERR(clk); - } - ret = clk_prepare_enable(clk); - if (ret) { - pr_err("failed to enable PCLK\n"); - return ret; - } - tick_rate = clk_get_rate(clk); - - return fttmr010_timer_common_init(np); -} -CLOCKSOURCE_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_of_init); - -/* - * Gemini-specific: relevant registers in the global syscon - */ -#define GLOBAL_STATUS 0x04 -#define CPU_AHB_RATIO_MASK (0x3 << 18) -#define CPU_AHB_1_1 (0x0 << 18) -#define CPU_AHB_3_2 (0x1 << 18) -#define CPU_AHB_24_13 (0x2 << 18) -#define CPU_AHB_2_1 (0x3 << 18) -#define REG_TO_AHB_SPEED(reg) ((((reg) >> 15) & 0x7) * 10 + 130) - -static int __init gemini_timer_of_init(struct device_node *np) -{ - static struct regmap *map; - int ret; - u32 val; - - map = syscon_regmap_lookup_by_phandle(np, "syscon"); - if (IS_ERR(map)) { - pr_err("Can't get regmap for syscon handle\n"); - return -ENODEV; - } - ret = regmap_read(map, GLOBAL_STATUS, &val); - if (ret) { - pr_err("Can't read syscon status register\n"); - return -ENXIO; - } - - tick_rate = REG_TO_AHB_SPEED(val) * 1000000; - pr_info("Bus: %dMHz ", tick_rate / 1000000); - - tick_rate /= 6; /* APB bus run AHB*(1/6) */ - - switch (val & CPU_AHB_RATIO_MASK) { - case CPU_AHB_1_1: - pr_cont("(1/1)\n"); - break; - case CPU_AHB_3_2: - pr_cont("(3/2)\n"); - break; - case CPU_AHB_24_13: - pr_cont("(24/13)\n"); - break; - case CPU_AHB_2_1: - pr_cont("(2/1)\n"); - break; - } - - return fttmr010_timer_common_init(np); -} -CLOCKSOURCE_OF_DECLARE(gemini, "cortina,gemini-timer", gemini_timer_of_init); +CLOCKSOURCE_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_init); +CLOCKSOURCE_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init);