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[213.113.119.121]) by smtp.gmail.com with ESMTPSA id 1sm2116318ljg.53.2017.06.11.14.26.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Jun 2017 14:26:38 -0700 (PDT) From: Linus Walleij To: Daniel Lezcano , Thomas Gleixner , Joel Stanley , Jonas Jensen Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli , linux-kernel@vger.kernel.org, Linus Walleij , Andrew Jeffery Subject: [PATCH 2/2] drivers/clocksource/fttmr010: Implement delay timer Date: Sun, 11 Jun 2017 23:26:17 +0200 Message-Id: <20170611212617.6906-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170611212617.6906-1-linus.walleij@linaro.org> References: <20170611212617.6906-1-linus.walleij@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This timer is often used on the ARM architecture, so as with so many siblings, we can implement delay timers, removing the need for the system to calibrate jiffys at boot, and potentially handling CPU frequency scaling on targets. We cannot just protect the Kconfig with a "depends on ARM" because it is already known that different architectures are using Faraday IP blocks, so it is better to make things open-ended and use Result on boot dmesg: Switching to timer-based delay loop, resolution 40n Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000) This is accurately the timer frequency, 250MHz on the APB bus. Cc: Andrew Jeffery Cc: Joel Stanley Cc: Jonas Jensen Signed-off-by: Linus Walleij --- drivers/clocksource/timer-fttmr010.c | 35 ++++++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) -- 2.9.4 Tested-by: Jonas Jensen Tested-by: Andrew Jeffery diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c index 5e82469995cb..0074d89cd2ce 100644 --- a/drivers/clocksource/timer-fttmr010.c +++ b/drivers/clocksource/timer-fttmr010.c @@ -17,6 +17,7 @@ #include #include #include +#include /* * Register definitions for the timers @@ -81,9 +82,15 @@ struct fttmr010 { bool count_down; u32 t1_enable_val; struct clock_event_device clkevt; +#ifdef CONFIG_ARM + struct delay_timer delay_timer; +#endif }; -/* A local singleton used by sched_clock, which is stateless */ +/* + * A local singleton used by sched_clock and delay timer reads, which are + * fast and stateless + */ static struct fttmr010 *local_fttmr; static inline struct fttmr010 *to_fttmr010(struct clock_event_device *evt) @@ -101,6 +108,20 @@ static u64 notrace fttmr010_read_sched_clock_down(void) return ~readl(local_fttmr->base + TIMER2_COUNT); } +#ifdef CONFIG_ARM + +static unsigned long fttmr010_read_current_timer_up(void) +{ + return readl(local_fttmr->base + TIMER2_COUNT); +} + +static unsigned long fttmr010_read_current_timer_down(void) +{ + return ~readl(local_fttmr->base + TIMER2_COUNT); +} + +#endif + static int fttmr010_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { @@ -349,6 +370,18 @@ static int __init fttmr010_timer_init(struct device_node *np) fttmr010->tick_rate, 1, 0xffffffff); +#ifdef CONFIG_ARM + /* Also use this timer for delays */ + if (fttmr010->count_down) + fttmr010->delay_timer.read_current_timer = + fttmr010_read_current_timer_down; + else + fttmr010->delay_timer.read_current_timer = + fttmr010_read_current_timer_up; + fttmr010->delay_timer.freq = fttmr010->tick_rate; + register_current_timer_delay(&fttmr010->delay_timer); +#endif + return 0; out_unmap: