From patchwork Wed Aug 16 00:38:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 110194 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp183522obb; Tue, 15 Aug 2017 17:39:10 -0700 (PDT) X-Received: by 10.98.159.28 with SMTP id g28mr23214757pfe.212.1502843950541; Tue, 15 Aug 2017 17:39:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502843950; cv=none; d=google.com; s=arc-20160816; b=NR3M/j4nC1SVLNW+vtsCijTsAoMgESUcrHoKVmdfQAnRjbJKezKDifsM+XRwklbPr6 O5PtBtLLUXrHWyTPqhR7WmbZVf5EoXb9ufKsRJ4f4F/SwNmsdMbgm1XhBnge/vmJgKY7 SEjGPzPGK7LeQkTIKIjCudMZYHSNvDt2GpPT7UVf9kuRFdIkMXYxRCFwWXbGmEh7ZDHj kEZms2QJDJzojTBbyhL40Qp4v6ZEW8R/O2jgvN1hTnzY94BT21PQ7o0rouaLPHNOqxEB GeNm19+H7D2HNDddpVy/Fxna108LENSCYjtrZwz6yl/HtwyWBF4DCWW/F3GCwZn97oKD g+Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=YHlWuNZ12ERntXLKXh1U7gwdqLNW6XJUBfsR+sgy4dk=; b=dYV0BR7l9/vVsY5hm3DFWG7hwIpQFgK/gf9NEf5BjHTBvxZaUSP0zLAy3YmfA75cLv l3BpQ70S4Z1BVW3+5qrlrCgOE1MMXm8/gTDWMPChvG4y/Z8UNwIscfXTGR+JR4H57A13 qkgj//06rSmlHnRVL7JnXkO9GIWhbLZo25LhRrjv15Cagu605KQK0+a0NK3tNGYBh0nW QtBSpTycXR5ZtC/oewg2MGUbrOFFqce8EusGrnTiR27Nqoqw5o7Tu8hM1ABJFUp6Mlr2 UqH88cNfZORzu/eCeXqgPy/PMQL/qbefgRoHJULSKu+8jQmRYsYEKil/PCX22MFSmAYk xHoQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 17si6212729pfv.598.2017.08.15.17.39.10; Tue, 15 Aug 2017 17:39:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753465AbdHPAjH (ORCPT + 26 others); Tue, 15 Aug 2017 20:39:07 -0400 Received: from mx2.suse.de ([195.135.220.15]:45367 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753151AbdHPAjD (ORCPT ); Tue, 15 Aug 2017 20:39:03 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D141AAF37; Wed, 16 Aug 2017 00:39:01 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Philipp Zabel , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 2/5] arm64: dts: realtek: Add RTD1295 reset controller nodes Date: Wed, 16 Aug 2017 02:38:44 +0200 Message-Id: <20170816003847.6208-3-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170816003847.6208-1-afaerber@suse.de> References: <20170816003847.6208-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add nodes for the Realtek RTD1295 reset controllers. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.12.3 diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 43da91fce2b1..9f1dcd1fa8b3 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -87,6 +87,36 @@ /* Exclude up to 2 GiB of RAM */ ranges = <0x80000000 0x80000000 0x80000000>; + reset1: reset-controller@98000000 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000000 0x4>; + #reset-cells = <1>; + }; + + reset2: reset-controller@98000004 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000004 0x4>; + #reset-cells = <1>; + }; + + reset3: reset-controller@98000008 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000008 0x4>; + #reset-cells = <1>; + }; + + reset4: reset-controller@98000050 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000050 0x4>; + #reset-cells = <1>; + }; + + iso_reset: reset-controller@98007088 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98007088 0x4>; + #reset-cells = <1>; + }; + uart0: serial@98007800 { compatible = "snps,dw-apb-uart"; reg = <0x98007800 0x400>;