From patchwork Fri Dec 1 22:23:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Linton X-Patchwork-Id: 120408 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1707137qgn; Fri, 1 Dec 2017 14:25:36 -0800 (PST) X-Google-Smtp-Source: AGs4zMaAd7z1NWeOgRxR9nlWlccPYufv++5ZHZ4DyhZoDpwBQ3XvLMOkQNsK5nzmn6LlF3+H43tp X-Received: by 10.84.240.1 with SMTP id y1mr7659023plk.391.1512167136299; Fri, 01 Dec 2017 14:25:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512167136; cv=none; d=google.com; s=arc-20160816; b=B/wavTXBjCqP6uebRRncVJKxSGzsU2nFMbp6TrZ9aGGzJWKvCTsDXionVIfNhcOkHe PKTdxtVo5oQ8mwtGzRueugjlL7Qt559PQ/7+/T/p2Z+t8xScBzO2zIlx6UvfBwOQ3kPa fFBDeFjGSm6Y3XqXVOJCkgqNqsCD0eDejFaOyd16WgYaSlMtWxzN8un9I1vf51e4vn30 6ip4xc+Bo2TOQDvgaY1ZXD1Fx7rs4W5petrYHQPYXCzwvTX/9ZDjOeh9rvfuL/incKY6 XT7QJcsBZhh+WO4JEe1iMUAAiHdctOqo+sFNE7xxoTaOgxCHiFI/zd28W0sw8If5S1e+ QPgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Jn5QzMcAOiQk3vK8+6S2qzrFf4rulolq+gsNTRBEJN4=; b=vLqK36t6BzBRLNfvA9KdbtK8YlUdcb90nz29tRiOU/pHE9wfOba3I0DhzPEnFYguby cspTlw5c86JN9LRV8+f82ulvRPxx4mJ1gG7SXm6FZZtL9M5/hbWbWplHHIdytJV36ALy vIr05eLwS3HGwUmZ0za0GpXIv9UEIXddkFh3tn/gcVfUx2LXLp5D+aLP5tmawWytH8jx 9sFwbi/xC4pdZZbdEtCAUZYcate5urskbz8/5eqbWcv9gRSrTisTxDXMGYRTWLb3m3VG JIAsLle24Pvz43ZyaqN2qUaJJDp6K1bhH8ZirDjxKdsb5prlg8y4kvNFYBFPjA/cHzql +tVg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b16si5810435pff.393.2017.12.01.14.25.36; Fri, 01 Dec 2017 14:25:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752127AbdLAWZd (ORCPT + 28 others); Fri, 1 Dec 2017 17:25:33 -0500 Received: from foss.arm.com ([217.140.101.70]:47090 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751682AbdLAWYB (ORCPT ); Fri, 1 Dec 2017 17:24:01 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1AD761650; Fri, 1 Dec 2017 14:24:01 -0800 (PST) Received: from beelzebub.austin.arm.com (beelzebub.austin.arm.com [10.118.12.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 350243F246; Fri, 1 Dec 2017 14:24:00 -0800 (PST) From: Jeremy Linton To: linux-acpi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, sudeep.holla@arm.com, hanjun.guo@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, will.deacon@arm.com, catalin.marinas@arm.com, gregkh@linuxfoundation.org, viresh.kumar@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, jhugo@codeaurora.org, wangxiongfeng2@huawei.com, Jonathan.Zhang@cavium.com, ahs3@redhat.com, Jayachandran.Nair@cavium.com, austinwc@codeaurora.org, lenb@kernel.org, Jeremy Linton Subject: [PATCH v5 5/9] arm64: Add support for ACPI based firmware tables Date: Fri, 1 Dec 2017 16:23:26 -0600 Message-Id: <20171201222330.18863-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20171201222330.18863-1-jeremy.linton@arm.com> References: <20171201222330.18863-1-jeremy.linton@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The /sys cache entries should support ACPI/PPTT generated cache topology information. Lets detect ACPI systems and call an arch specific cache_setup_acpi() routine to update the hardware probed cache topology. For arm64, if ACPI is enabled, determine the max number of cache levels and populate them using the PPTT table if one is available. Signed-off-by: Jeremy Linton --- arch/arm64/kernel/cacheinfo.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) -- 2.13.5 diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c index 380f2e2fbed5..0bf0a835122f 100644 --- a/arch/arm64/kernel/cacheinfo.c +++ b/arch/arm64/kernel/cacheinfo.c @@ -17,6 +17,7 @@ * along with this program. If not, see . */ +#include #include #include @@ -46,7 +47,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, static int __init_cache_level(unsigned int cpu) { - unsigned int ctype, level, leaves, of_level; + unsigned int ctype, level, leaves, fw_level; struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) { @@ -59,15 +60,19 @@ static int __init_cache_level(unsigned int cpu) leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1; } - of_level = of_find_last_cache_level(cpu); - if (level < of_level) { + if (acpi_disabled) + fw_level = of_find_last_cache_level(cpu); + else + fw_level = acpi_find_last_cache_level(cpu); + + if (level < fw_level) { /* * some external caches not specified in CLIDR_EL1 * the information may be available in the device tree * only unified external caches are considered here */ - leaves += (of_level - level); - level = of_level; + leaves += (fw_level - level); + level = fw_level; } this_cpu_ci->num_levels = level;