From patchwork Tue Dec 5 14:46:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 120660 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5836888qgn; Tue, 5 Dec 2017 06:48:57 -0800 (PST) X-Google-Smtp-Source: AGs4zMa1EszAKg/ATW6BZuiqcJUloArVX5iIrpMlFqU0fjqt9R0RBjMqgJLNdQkfRQSbHJlsCSLh X-Received: by 10.84.139.129 with SMTP id 1mr18221515plr.327.1512485337796; Tue, 05 Dec 2017 06:48:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512485337; cv=none; d=google.com; s=arc-20160816; b=aLLnfytPuKliU1GQ/kI0JxV2cx4WA8U0j6aBC9cNFaZlRhlfhjWAGjUBTu4yv/Hng+ bKWzJMw0tbnlAE5DopMagJSUlM5DlSYPWnd6EAQA+00SjtWAezOQB56aqVS3t0476/A6 XkunhzNG5WtAyZVpf3nXFoIsypLffquCOA4Lzuj+h0OpXMWyt8S8cSZhd324AOt2w41T fYHVp6q+/ssW1hDsPpYKW/281A3e1OAEHL/NYFMSeE6ZkBzT1x5F5y35GdtvIN2tmPFl QNrKA9XKs8RtdVVx9xG/NcKvxH01hhJ7luOEraQ7TjzmanAeHq0Xr0yrnLRwTMpjlCz0 mT6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=ZE0vy1RCUJ6TmUtxjeNs3yrEXZVOdvZytJ/JbXPSUpg=; b=BAnZ84v9e+qlrAHl4obwgJ8eA7SS3hnO95941IUl0vkLY+Ki22AY3Dx4LslgI0nZ2m W2vGO4Wee/icoh/mxnK+C/8zMnIuodxhIx7fc4mN5CnORHJI0SksTIZYj+lMwRgMWJTl oQ9rDebUYUIDR+sAZfQN/V2g1dBhedlXbSJCeI3tED9IJgTZrrzoMXFP5PtGzLKa6xHt 6f/9xq4wItRrTABnx/Hb9kK1WLjKXTE12fJhbk1iA9j1JOcnsuVXvZ6kaABHQLGzsEiQ 35c9jXkVHm57JeMXsHk3wzORbNp7uzaktDEgXpalrBEbKlgRKioP5XB+2+5oSc0UsCl9 a7FA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i1si167663pld.759.2017.12.05.06.48.57; Tue, 05 Dec 2017 06:48:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752891AbdLEOsz (ORCPT + 28 others); Tue, 5 Dec 2017 09:48:55 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:54819 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752686AbdLEOsh (ORCPT ); Tue, 5 Dec 2017 09:48:37 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 23CD5209E1; Tue, 5 Dec 2017 15:48:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id C298520976; Tue, 5 Dec 2017 15:48:34 +0100 (CET) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thomas.petazzoni@free-electrons.com, linux-sunxi@googlegroups.com, Quentin Schulz Subject: [PATCH v5 6/9] pinctrl: axp209: add programmable gpio_status_offset Date: Tue, 5 Dec 2017 15:46:44 +0100 Message-Id: <20171205144647.17594-7-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171205144647.17594-1-quentin.schulz@free-electrons.com> References: <20171205144647.17594-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To prepare for patches that will add support for a new PMIC that has a different GPIO input status register, add a gpio_status_offset within axp20x_pctl structure and use it. Signed-off-by: Quentin Schulz Acked-by: Maxime Ripard Acked-by: Chen-Yu Tsai --- drivers/pinctrl/pinctrl-axp209.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.14.1 diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index 17eeb0410a5b..db8e319b6e11 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -48,6 +48,7 @@ struct axp20x_pctrl_desc { u8 ldo_mask; /* Stores the pins supporting ADC function. Bit offset is pin number. */ u8 adc_mask; + u8 gpio_status_offset; }; struct axp20x_pinctrl_function { @@ -77,6 +78,7 @@ static const struct axp20x_pctrl_desc axp20x_data = { .npins = ARRAY_SIZE(axp209_pins), .ldo_mask = BIT(0) | BIT(1), .adc_mask = BIT(0) | BIT(1), + .gpio_status_offset = 4, }; static int axp20x_gpio_get_reg(unsigned int offset) @@ -108,7 +110,7 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) if (ret) return ret; - return !!(val & BIT(offset + 4)); + return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); } static int axp20x_gpio_get_direction(struct gpio_chip *chip,