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[209.132.180.67]) by mx.google.com with ESMTP id s24si3123369plp.113.2017.12.10.21.08.29; Sun, 10 Dec 2017 21:08:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=ett96tSY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752355AbdLKFI2 (ORCPT + 24 others); Mon, 11 Dec 2017 00:08:28 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:46335 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752277AbdLKFIX (ORCPT ); Mon, 11 Dec 2017 00:08:23 -0500 Received: by mail-pg0-f66.google.com with SMTP id b11so10137780pgu.13; Sun, 10 Dec 2017 21:08:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=h3V+zjUuLXfGaZ13W3JQN+SZRDMI9YAZ1Gmgc72wsNs=; b=ett96tSYBkNBYK2MSIFf4M4++BwmpwOf/5MbXYk4ILVmb57Q9Xy6MhBlGNbJisbgGo G1wXTSa+MB0dLXudwwTvBojvj1uhMxvG7Rj/HMvibcaE63tcz6cDCQFcVBKVUMKVlbXZ NmZRzaguEwzu9vlwVRak5nvGRL34CsCfrMREbLOmDB9icFtT6AFVJtBd5u/wIzOCOxE3 HuElGtk1Xis2TlbsDdDd7IrjVJpHDLQ30PfV5sX+jZMcfR+Pt18SCWb50jWiaNjSFoWy 3VepLC/iPhJwO3GmhfmHxP7cehHELneaOGTggo51QrovBnDTqE7yz7DBAh2x6aShhVMz tz4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=h3V+zjUuLXfGaZ13W3JQN+SZRDMI9YAZ1Gmgc72wsNs=; b=s72K0E+sX0b8kOKawddiTzW/+BWs5dbpJsvjX2TlZtlvRPFo3+9AsJ1FnHsyiJERRV MI2Ma0SXg1mX1O/0QzspqbB5okpH4+xtGX3n1eIoLzbmeHwqOspUMQ9co29qaB4UqxuD 2qE3lJB3sk8k2hhAOVHS2yeEAsoE8pSnn4i8ZWRS6xYWjq3gbp8yfLs1jHMUtG22caaP Tzm1uqXs8aZdzVAh62LI+3G0sz4PB7Jtr5teI4EWpJWDAus6YJeUn7n/FqPwC27HQj7O qRRBlSlByiFAGW8st537nqPiwsXREu0XPtKdPlYQJLVVETaq6tu7hE9lvYHG6Adm/XKZ w0TA== X-Gm-Message-State: AJaThX5cGHD92wz1m0gLz0vqqaB7jNQMfcNPamJPtcNeBPXBD5RCVYFB Iu3K9FRn+B+/0q/3sB3AJ74= X-Received: by 10.99.103.70 with SMTP id b67mr37238633pgc.211.1512968903063; Sun, 10 Dec 2017 21:08:23 -0800 (PST) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id c24sm24685612pfl.2.2017.12.10.21.08.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 10 Dec 2017 21:08:21 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Mon, 11 Dec 2017 15:38:13 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH 02/20] dt-bindings: gpio: Add ASPEED constants Date: Mon, 11 Dec 2017 15:36:46 +1030 Message-Id: <20171211050704.20621-3-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171211050704.20621-1-joel@jms.id.au> References: <20171211050704.20621-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These are used to by the device tree to map pin numbers to constants required by the GPIO bindings. Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 1 + arch/arm/boot/dts/aspeed-g5.dtsi | 1 + include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++ 3 files changed, 51 insertions(+) create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h -- 2.14.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 45d815a86d42..100d092e6c07 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "skeleton.dtsi" +#include / { model = "Aspeed BMC"; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 5c4ecdba3a6b..1f9d28313f82 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "skeleton.dtsi" +#include / { model = "Aspeed BMC"; diff --git a/include/dt-bindings/gpio/aspeed-gpio.h b/include/dt-bindings/gpio/aspeed-gpio.h new file mode 100644 index 000000000000..56fc4889b2c4 --- /dev/null +++ b/include/dt-bindings/gpio/aspeed-gpio.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides constants for binding aspeed,*-gpio. + * + * The first cell in Aspeed's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_ASPEED_GPIO_H +#define _DT_BINDINGS_GPIO_ASPEED_GPIO_H + +#include + +#define ASPEED_GPIO_PORT_A 0 +#define ASPEED_GPIO_PORT_B 1 +#define ASPEED_GPIO_PORT_C 2 +#define ASPEED_GPIO_PORT_D 3 +#define ASPEED_GPIO_PORT_E 4 +#define ASPEED_GPIO_PORT_F 5 +#define ASPEED_GPIO_PORT_G 6 +#define ASPEED_GPIO_PORT_H 7 +#define ASPEED_GPIO_PORT_I 8 +#define ASPEED_GPIO_PORT_J 9 +#define ASPEED_GPIO_PORT_K 10 +#define ASPEED_GPIO_PORT_L 11 +#define ASPEED_GPIO_PORT_M 12 +#define ASPEED_GPIO_PORT_N 13 +#define ASPEED_GPIO_PORT_O 14 +#define ASPEED_GPIO_PORT_P 15 +#define ASPEED_GPIO_PORT_Q 16 +#define ASPEED_GPIO_PORT_R 17 +#define ASPEED_GPIO_PORT_S 18 +#define ASPEED_GPIO_PORT_T 19 +#define ASPEED_GPIO_PORT_U 20 +#define ASPEED_GPIO_PORT_V 21 +#define ASPEED_GPIO_PORT_W 22 +#define ASPEED_GPIO_PORT_X 23 +#define ASPEED_GPIO_PORT_Y 24 +#define ASPEED_GPIO_PORT_Z 25 +#define ASPEED_GPIO_PORT_AA 26 +#define ASPEED_GPIO_PORT_AB 27 +#define ASPEED_GPIO_PORT_AC 28 + +#define ASPEED_GPIO(port, offset) \ + ((ASPEED_GPIO_PORT_##port * 8) + offset) + +#endif