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[209.132.180.67]) by mx.google.com with ESMTP id w3si11677742pgb.258.2018.02.21.08.03.14; Wed, 21 Feb 2018 08:03:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L0ZlwewG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966185AbeBUQDJ (ORCPT + 28 others); Wed, 21 Feb 2018 11:03:09 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:33979 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754733AbeBUQDE (ORCPT ); Wed, 21 Feb 2018 11:03:04 -0500 Received: by mail-pl0-f67.google.com with SMTP id u13so1144729plq.1 for ; Wed, 21 Feb 2018 08:03:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9uKW4JvNRIieZrqZFfYAojQwcdGRMvQgRSLj5vBHdRc=; b=L0ZlwewG35XVllJ9BxRAI3CwK9I9WYfliDJWkHEOMpxny8IaJNADjgzxfgkHk7T++t kKGRFs0QUoJIe0HaeB3/jmKwzbnV5bLqTHWAm3KJomwCZ43VsHPqbtEoxaOwYJbmaEVJ AfIMq1wSklzi1fKHvPDt/C1rFq0OHj0+mmn+w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9uKW4JvNRIieZrqZFfYAojQwcdGRMvQgRSLj5vBHdRc=; b=KMZAHDOGF+wbaMlFndr2u204sa4ApkwuPSCB4TNmc0xaztIrsOxNuEM77CI0HlFcra hZdkNymOVn9HEA9s7ggnvNFY8xhvzfknbQ6SPKV4b9JOb18xNEwJHzu069lv9fQzVyqg w73lgEN0ebpVR7g2Mn+D5RaTlEg3HYv7iK1i2b5HEcpSbTOFiJ3PBldaZc/RU6gFvjNc nTsG+hs9fiMbeBPtE+pgHOWinTExZ9vFPj0T+xBxwa0SiGDU4eZdxw9DfNrbAt8D+7aK qqGVJmj5aRCHW2xLoldluMGKfOfaXTQFhgF/aFNj3jj07cRP/zBtIuUxCa+CMeUSKFxr kivw== X-Gm-Message-State: APf1xPAw7v/fxtQjSOjROSSxFQDVwTrUbLxJhWc1B13aOZksmoIUZi0J +zQFA/cW/VXI/Vc+dxNdyC9n X-Received: by 2002:a17:902:5982:: with SMTP id p2-v6mr3433588pli.289.1519228983756; Wed, 21 Feb 2018 08:03:03 -0800 (PST) Received: from localhost.localdomain ([2405:204:7346:6848:3cb8:23ad:d761:239e]) by smtp.gmail.com with ESMTPSA id s67sm43068910pfg.104.2018.02.21.08.02.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Feb 2018 08:03:03 -0800 (PST) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, Manivannan Sadhasivam Subject: [PATCH v2 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC Date: Wed, 21 Feb 2018 21:30:39 +0530 Message-Id: <20180221160044.15089-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> References: <20180221160044.15089-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt -- 2.14.1 diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt new file mode 100644 index 000000000000..855197e587a1 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt @@ -0,0 +1,76 @@ +* Actions Semi OWL GPIO controller bindings + +The GPIOs are organized as individual banks/ports with variable number +of GPIOs. Each bank is represented as an individual GPIO controller. + +Required properties: +- compatible : Should be "actions,s900-gpio" +- reg : Address and range of the GPIO controller registers. +- gpio-controller : Marks the device node as a GPIO controller. +- #gpio-cells : Should be <2>. The first cell is the gpio number and + the second cell is used to specify optional parameters. + +Optional properties: +- gpio-ranges : Mapping between GPIO and pinctrl + +Note: Each GPIO port should have an alias correctly numbered in "aliases" +node. + +Examples: + +aliases { + gpio0 = &gpioa; + gpio1 = &gpiob; + gpio2 = &gpioc; + gpio3 = &gpiod; + gpio4 = &gpioe; + gpio5 = &gpiof; +}; + + gpioa: gpioa@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; + }; + + gpiob: gpiob@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 32 32>; + }; + + gpioc: gpioc@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 64 12>; + }; + + gpiod: gpiod@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 76 30>; + }; + + gpioe: gpioe@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 106 32>; + }; + + gpiof: gpiof@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 138 8>; + };