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[209.132.180.67]) by mx.google.com with ESMTP id 2-v6si4294276ple.387.2018.03.01.21.51.07; Thu, 01 Mar 2018 21:51:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Mv0cHgK2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935966AbeCBFvE (ORCPT + 28 others); Fri, 2 Mar 2018 00:51:04 -0500 Received: from mail-pl0-f66.google.com ([209.85.160.66]:35913 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935951AbeCBFu6 (ORCPT ); Fri, 2 Mar 2018 00:50:58 -0500 Received: by mail-pl0-f66.google.com with SMTP id 61-v6so5096678plf.3 for ; Thu, 01 Mar 2018 21:50:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LnvVZPRURX9Gme+QX470aYmHcqJ19kBDdz1oGQSy80Q=; b=Mv0cHgK2ZnpciNHwVsKTY4N67e3ySv5AaxD9Hz4n0MrN5t+fT83Gu9/cxOSQxU6SfW 7quZCkMussBanSTU/WcOnyiBe89IKZxJfHuy5lWc5LloDaRqokrLxkrLBcRF1jcQzG4a gQXs2y2xBgQBmRFqnWuCme97ctlaWKF4CTqE4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LnvVZPRURX9Gme+QX470aYmHcqJ19kBDdz1oGQSy80Q=; b=QKa8HhwMpASC+Gj8AoUn56z74cspHZIQkvxkl+IUbwpoPPiIOoqy5U/zD2ZmDhq4xY E4mvNky8yEdHVRa8JWsD0ls+KNhIVUCV04nsBP6jVE26Mw4gq8CdJGM7LXyfwAy2ZnXH ZWXdKjbPBWgeXAOPVSQvlaSyC23xoNeGqitcPJsYTzxaguvFSytWHLOOYqUY+M2YmR5g 6L+Utg5NuSwCZyCKS3Zw1Zg0UCs55pp/gwxhBNI1z4ShOQ8fFRW+8W6uKGqfdqM071Tl GJW9Eg9FRCD8dDYepLdPzc2r+jyhLak1G5ztBlw4Lt2Hbnqs8x84sheWzOn2ozlkg2Rv ioAw== X-Gm-Message-State: APf1xPCiK2n/iIzr80TbN+FAP2PI0/QYhYGtQ89AdCbDhE7noh9b/wrX IMwh/KE1Kfv954vzEQT4tHKc X-Received: by 2002:a17:902:6c41:: with SMTP id h1-v6mr4201743pln.25.1519969858156; Thu, 01 Mar 2018 21:50:58 -0800 (PST) Received: from localhost.localdomain ([2405:204:71c0:7f9a:bd87:b648:dccb:cbc9]) by smtp.gmail.com with ESMTPSA id t63sm12569748pfj.44.2018.03.01.21.50.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Mar 2018 21:50:57 -0800 (PST) From: Manivannan Sadhasivam To: mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org, mark.rutland@arm.com Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, davem@davemloft.net, mchehab@kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, manivannanece23@gmail.com, Manivannan Sadhasivam Subject: [PATCH v4 03/11] arm64: dts: actions: Source CMU clock for UART5 Date: Fri, 2 Mar 2018 11:18:52 +0530 Message-Id: <20180302054900.11275-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180302054900.11275-1-manivannan.sadhasivam@linaro.org> References: <20180302054900.11275-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove fixed clock and source CMU (Clock Management Unit) clock for UART5 driver in Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) -- 2.14.1 diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts index 21ca80f9941c..ff043c961d75 100644 --- a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts +++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts @@ -24,12 +24,6 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; - - uart5_clk: uart5-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -38,5 +32,5 @@ &uart5 { status = "okay"; - clocks = <&uart5_clk>; + clocks = <&cmu CLK_UART5>; };