From patchwork Wed Apr 18 11:40:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 133618 Delivered-To: patch@linaro.org Received: by 10.46.84.18 with SMTP id i18csp5777179ljb; Wed, 18 Apr 2018 04:45:22 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/x5CLKyTfU3MIDD4XHgAoVuw6PE0Jb+Vj8xMKn5iWPzFF0Vl/KzR9WFwvptrjZh9fTLKjs X-Received: by 2002:a17:902:b28:: with SMTP id 37-v6mr1760967plq.207.1524051922339; Wed, 18 Apr 2018 04:45:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524051922; cv=none; d=google.com; s=arc-20160816; b=tI3rUyz1rxoeQjRDmCu+M9c1CKSTK9VTen0SwPezDW0YhJOpxH0eOWd7VhZobzmxKF S3ptabn1SVYjCjrU+7wp62nhpmgxgS3RIDQvTxshmcp9z1PyYHxtZYB6yK1OHiNfLeEe 3LU8IoBxZfG4rMq49mEDOoiYKIu53vhP0pt+wqV8hTm6K/JF7N1CQ1Co7O3S5j0e7lDu heb466++pxptDY9MrJajMAXyN+P5BVuQD/YA7AQqsRqgw/UVD6OUT29CPsJOkroYnORM c3yQynf1IJxv8Idsxim5mkij6vLMLbc3M8D/k7SwzG0hxTvHRzTeDNZdWiQ2TgwJaA3A Maog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=yv6c/8aiMpLlRtXrCgrgePvKTAsKrdqn2OzaUV5hnmU=; b=0Xg9EPCMbZK2dU0VQ/ZfMb2320F6MLNXzDPC+G1usUWeaHJwHWojOFu/hfhJ3gt0+k YnS7FT+fhgLp8PMzhtAyy7GtTQM4NaJRowFCttlzS6k5TjmQAAlpnm7k1HxQGjL/ZJ6l aa5oJrz9XUEhzzFPFiIZnoxKZXteGEUEh4jlcwGmdaBSllRcUC0YcXqvnl3IH+D7qK2u NPinPJ6YWt9Ocru4tC+9Hmj//Ctg3WoUzjB+Y6dN06go4BjWlt8dlnUrbHQnIZWIVm9F GgwTPApjbAN2BxRnag/nQUB7PBp5+muwCYnFlsCYxDWT1GSxlpi5AKrAqJop1+Cb1HlR EJCg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r9si951394pgv.119.2018.04.18.04.45.22; Wed, 18 Apr 2018 04:45:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753847AbeDRLpB (ORCPT + 29 others); Wed, 18 Apr 2018 07:45:01 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:42314 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754032AbeDRLnz (ORCPT ); Wed, 18 Apr 2018 07:43:55 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 3F5FD38666FCB; Wed, 18 Apr 2018 19:43:51 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.361.1; Wed, 18 Apr 2018 19:43:45 +0800 From: Shameer Kolothum To: , , CC: , , , , , , Shameer Kolothum , Joerg Roedel Subject: [PATCH v6 4/7] iommu/dma: Move PCI window region reservation back into dma specific path. Date: Wed, 18 Apr 2018 12:40:42 +0100 Message-ID: <20180418114045.7968-5-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20180418114045.7968-1-shameerali.kolothum.thodi@huawei.com> References: <20180418114045.7968-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This pretty much reverts commit 273df9635385 ("iommu/dma: Make PCI window reservation generic") by moving the PCI window region reservation back into the dma specific path so that these regions doesn't get exposed via the IOMMU API interface. With this change, the vfio interface will report only iommu specific reserved regions to the user space. Cc: Joerg Roedel Signed-off-by: Shameer Kolothum Reviewed-by: Robin Murphy --- drivers/iommu/dma-iommu.c | 54 ++++++++++++++++++++++------------------------- 1 file changed, 25 insertions(+), 29 deletions(-) -- 2.7.4 diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index f05f3cf..ddcbbdb 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -167,40 +167,16 @@ EXPORT_SYMBOL(iommu_put_dma_cookie); * @list: Reserved region list from iommu_get_resv_regions() * * IOMMU drivers can use this to implement their .get_resv_regions callback - * for general non-IOMMU-specific reservations. Currently, this covers host - * bridge windows for PCI devices and GICv3 ITS region reservation on ACPI - * based ARM platforms that may require HW MSI reservation. + * for general non-IOMMU-specific reservations. Currently, this covers GICv3 + * ITS region reservation on ACPI based ARM platforms that may require HW MSI + * reservation. */ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { - struct pci_host_bridge *bridge; - struct resource_entry *window; - - if (!is_of_node(dev->iommu_fwspec->iommu_fwnode) && - iort_iommu_msi_get_resv_regions(dev, list) < 0) - return; - - if (!dev_is_pci(dev)) - return; - - bridge = pci_find_host_bridge(to_pci_dev(dev)->bus); - resource_list_for_each_entry(window, &bridge->windows) { - struct iommu_resv_region *region; - phys_addr_t start; - size_t length; - - if (resource_type(window->res) != IORESOURCE_MEM) - continue; - start = window->res->start - window->offset; - length = window->res->end - window->res->start + 1; - region = iommu_alloc_resv_region(start, length, 0, - IOMMU_RESV_RESERVED); - if (!region) - return; + if (!is_of_node(dev->iommu_fwspec->iommu_fwnode)) + iort_iommu_msi_get_resv_regions(dev, list); - list_add_tail(®ion->list, list); - } } EXPORT_SYMBOL(iommu_dma_get_resv_regions); @@ -229,6 +205,23 @@ static int cookie_init_hw_msi_region(struct iommu_dma_cookie *cookie, return 0; } +static void iova_reserve_pci_windows(struct pci_dev *dev, + struct iova_domain *iovad) +{ + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); + struct resource_entry *window; + unsigned long lo, hi; + + resource_list_for_each_entry(window, &bridge->windows) { + if (resource_type(window->res) != IORESOURCE_MEM) + continue; + + lo = iova_pfn(iovad, window->res->start - window->offset); + hi = iova_pfn(iovad, window->res->end - window->offset); + reserve_iova(iovad, lo, hi); + } +} + static int iova_reserve_iommu_regions(struct device *dev, struct iommu_domain *domain) { @@ -238,6 +231,9 @@ static int iova_reserve_iommu_regions(struct device *dev, LIST_HEAD(resv_regions); int ret = 0; + if (dev_is_pci(dev)) + iova_reserve_pci_windows(to_pci_dev(dev), iovad); + iommu_get_resv_regions(dev, &resv_regions); list_for_each_entry(region, &resv_regions, list) { unsigned long lo, hi;