From patchwork Mon May 14 09:46:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 135704 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1531593lji; Mon, 14 May 2018 02:47:33 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoMMWROCi9wtM4b4jslmv+2gu+VUZ3o/TCSvEuxla7m0NZ+8kCQxmlBFq6fyRFuq0v6uRK8 X-Received: by 2002:a62:5c06:: with SMTP id q6-v6mr9768691pfb.118.1526291253386; Mon, 14 May 2018 02:47:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526291253; cv=none; d=google.com; s=arc-20160816; b=ztma2A1ZL2oLNHyp+JopxRqVKSyNIffcNnFQGVZy4NaZk8lFdY5jrDCZTdLlrcERZT JZy1xYi0J1PLMUzR9ilJPRzv/O7r7E0TJamk9X+dClcFNzgMHmjvzJBL6jI44GA4k1PV hxBTJMKH597oSeiAaTZU2DR0H+QVTvOb66BaH0T5Av5qc/cZn81j2ywRK2zTFcatdaTk MXGIKX0ZofZlvIy5CmPDQk/9id3jIlCV4bNvEmpqTivmsUiRxmCE8cwKk4AJg6WtnvOk a5dMdUw77qKSuiQsLxPul0L7NTVC3I44jjKtk+8truJWuGusHr7tqfjndM7gDPXoaAxs RwGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=uUL9hPQnpzX+XoPRbc6B0UKrDi6Pa+rhnQYp0fEF+wE=; b=kg/Bh2DgxDpjLAHknghZzzVKuZftDU3CabyRB3VIscHN2iNzbHMh4JHuxCvdHTJwmt bMSxWEuGBzznr01+FgY3xfbfB/h357ACjGk04hEOK0MB+/AXyrPhKeCEGTvVJk9y+OMn X195lWYm/7Yfe7PVmJJgrjMiMlQ1c77k1aFIrdWuCmRVq2no+337MDLMhzd4gQSknz8r 9ImPyhCVo3Sqy0+UWk1/f1avJ4apmEMoDmFoRamagaYzkh1x7C7toCJAJ+ILzx6Peuza N4PF+EoLHCeKPSG6YfJYyaU3IOJ6Nx+PlIEcht5MO/niQTYKr1A6dI/wwhA/AcnrO7ci OvWw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g34-v6si9002906pld.411.2018.05.14.02.47.33; Mon, 14 May 2018 02:47:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752384AbeENJra (ORCPT + 29 others); Mon, 14 May 2018 05:47:30 -0400 Received: from foss.arm.com ([217.140.101.70]:38208 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752292AbeENJr3 (ORCPT ); Mon, 14 May 2018 05:47:29 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E43E1435; Mon, 14 May 2018 02:47:29 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 500953F25D; Mon, 14 May 2018 02:47:27 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, catalin.marinas@arm.com, dave.martin@arm.com, james.morse@arm.com, linux@dominikbrodowski.net, linux-fsdevel@vger.kernel.org, marc.zyngier@arm.com, mark.rutland@arm.com, viro@zeniv.linux.org.uk, will.deacon@arm.com Subject: [PATCH 03/18] arm64: introduce sysreg_clear_set() Date: Mon, 14 May 2018 10:46:25 +0100 Message-Id: <20180514094640.27569-4-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180514094640.27569-1-mark.rutland@arm.com> References: <20180514094640.27569-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently we have a couple of helpers to manipulate bits in particular sysregs: * config_sctlr_el1(u32 clear, u32 set) * change_cpacr(u64 val, u64 mask) The parameters of these differ in naming convention, order, and size, which is unfortunate. They also differ slightly in behaviour, as change_cpacr() skips the sysreg write if the bits are unchanged, which is a useful optimization when sysreg writes are expensive. Before we gain more yet another sysreg manipulation function, let's unify these with a common helper, providing a consistent order for clear/set operands, and the write skipping behaviour from change_cpacr(). Code will be migrated to the new helper in subsequent patches. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Dave Martin Cc: Marc Zyngier --- arch/arm64/include/asm/sysreg.h | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.11.0 Reviewed-by: Dave Martin diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index bd1d1194a5e7..b52762769329 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -729,6 +729,17 @@ asm( asm volatile("msr_s " __stringify(r) ", %x0" : : "rZ" (__val)); \ } while (0) +/* + * Modify bits in a sysreg. Bits in the clear mask are zeroed, then bits in the + * set mask are set. Other bits are left as-is. + */ +#define sysreg_clear_set(sysreg, clear, set) do { \ + u64 __scs_val = read_sysreg(sysreg); \ + u64 __scs_new = (__scs_val & ~(u64)(clear)) | (set); \ + if (__scs_new != __scs_val) \ + write_sysreg(__scs_new, sysreg); \ +} while (0) + static inline void config_sctlr_el1(u32 clear, u32 set) { u32 val;