From patchwork Fri May 25 15:50:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 136953 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3758079lji; Fri, 25 May 2018 08:51:07 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpKnBdvZRN60Z+GwCgo/e8r6thzWsi209n88sTNhfDpm4S3sU3gYj/V0mgIg0bjneEq6Ho7 X-Received: by 2002:a17:902:4203:: with SMTP id g3-v6mr3223327pld.315.1527263467358; Fri, 25 May 2018 08:51:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527263467; cv=none; d=google.com; s=arc-20160816; b=yGs1KBSvqYIkNEXQyojnD3/10cLdIGjzyh1wX0+6GAlUzWwFz2w9gxMcVgn8e3oL0G 9b03kmtJtxDEbZrySAouhn7+9PiJeiOjjqWDEcCurNQWDSgKU3oA+4JElqbboCD1nfn8 gZ3upmL/plGBNNQtt5vVegLqqH2BH+ufZsuX8fqbQBN+Wgq5yDNdwz8nhN7K0GVi6xCg ZEXoBNmqiu73f97cez4Sa7QLoSEtKuYE1uGCWY5UTQoWbfVRcGhCEHeBkVHQEWc4Ql2N G+BMK17yddFMUyunSS5lAE7rLTIQrnEWsSoVs+7kpODwth4EYdpMdvgd2ZsBD+Fh+3Cv fBSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=0MynI0YbYtNDujLXkkxXUlAONz+64Zif0GTPLUR7rs4=; b=FkFzNUf4Bs08BbhFxgUdbLtQ+YBmu20K5z+5JzHgCO2zJkWB6NcDdQKzBhyw9a6A50 NBHBne9UHUW3pbjLVssWXh4Q2MHJrL3WjDHSuC5uuzdMFXtMn5LfQS6UA9uIrnaoDMua aMlHks0Qf7raiEQqofJMBbxy8d9sDU5tdzSPmUya8nyFBaF2nTGSP/CaYFPCFZk5tn4M RlHAWAzl4KO434Ew/2zhAObi0eS9PWj7M47uYHEI63be7qfROjRYbFLiR3IgCVRmjc4Q hK53zUYiJQozF/ApPETohsOA9YddQvInbLWU+UB6fuRBiJBjbq6c+tQLee09MjJBB1UP X2WA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u15-v6si24921044pfk.82.2018.05.25.08.51.07; Fri, 25 May 2018 08:51:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966807AbeEYPvE (ORCPT + 30 others); Fri, 25 May 2018 11:51:04 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:57579 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965666AbeEYPvC (ORCPT ); Fri, 25 May 2018 11:51:02 -0400 Received: from wuerfel.lan ([95.208.111.237]) by mrelayeu.kundenserver.de (mreue105 [212.227.15.145]) with ESMTPA (Nemesis) id 0LmLB4-1fw7yR1oqg-00ZvWm; Fri, 25 May 2018 17:50:53 +0200 From: Arnd Bergmann To: Oded Gabbay , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "David (ChunMing) Zhou" , David Airlie Cc: Arnd Bergmann , Felix Kuehling , Andres Rodriguez , Kent Russell , Harish Kasiviswanathan , Colin Ian King , dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/8] drm/amdgpu: fix 32-bit build warning Date: Fri, 25 May 2018 17:50:09 +0200 Message-Id: <20180525155030.3667352-2-arnd@arndb.de> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20180525155030.3667352-1-arnd@arndb.de> References: <20180525155030.3667352-1-arnd@arndb.de> X-Provags-ID: V03:K1:tLTWrYXK1XmFzZLwisy/MzqQOimKFZ/gBKSKdg92DpoZEKoM3d6 taKR1iy1GFRGryEPMWpUBJeb65etS2e2S5yQ7BkZTsOj8GUYkNfPVlaoMmngou1h3FM9e3X Vug1UAWFHUD8h//gmV9DvaI5zH6u4Mc4TNcSVbicSNsntGJKNzWStqD9Q5pqfJzWF4cB4u2 jPcLUOMUphxjvEKM0ACjw== X-UI-Out-Filterresults: notjunk:1; V01:K0:uC9nKQETneQ=:yV19KX2xB6NE4AtlRCzm8g B4vAN/r11tARlk2OlpuPKLyQgIsLQb2AasLCDmVmAM84vZ7GIy8uliv+tB2npf/YSOF3LFirf 3J/g6VXdIQyBaF4TLnzJxhIJJp7ekGVqheOKeCyTFa6d1KTogNAsCxxZSUyL/u7psjOkjm6yI qfAXZYzNAExlyTxbG5YG6nR/wTqKbSgAabtDM3mZcsmRzia9UlCcy+PEwq6AWKYEX6l+KgXNT YJcXvK6/Lk7OBPWcQ3RiTpgEnIhpuvS8f2JpAoNGSbuPFmGa9UMYfd8Nu0B5xS2u9lMcncRxT VogqBMjU05BTdVS2tqyxvb/W/+GPbcS5vZ44p+g7I4nO6ns6lBEZbYVX5fo9Naj94cVcRR/QL Bf3ob/z32LeNfR4DkexaEgP40yf7ECNMgHyvQnStkX199h6BjV+04L9aU+JubwSIZQ6Ru+rIl EKJx21LW0DXwqEdPbVj3vzDaVV9LPWHaA/pFN9TS4Mf1VjK/hN9mJp99MVKQCVovf8air9DNw 1ivB8qG2wca+UpAEsqAVxABCWM4OaxirS0y174kLDC/h485ZY2Rd4DTFa6aV2KIHEFDFMbZfQ YvySz8pcmyxRIKLr/sA+O7Ne/7I5RG8f4CbC65v8w2MHS0w5UFS0eitZJTP6nMdIZObps0QT0 PFWM57j/3n3SEUXyM6kv/eES4Le+uTBy1YzkWWBqI29Gg11v34CXXiltwADRnbuiK+V8= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Casting a pointer to a 64-bit type causes a warning on 32-bit targets: drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:473:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] lower_32_bits((uint64_t)wptr)); ^ drivers/gpu/drm/amd/amdgpu/amdgpu.h:1701:53: note: in definition of macro 'WREG32' #define WREG32(reg, v) amdgpu_mm_wreg(adev, (reg), (v), 0) ^ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:473:10: note: in expansion of macro 'lower_32_bits' lower_32_bits((uint64_t)wptr)); ^~~~~~~~~~~~~ The correct method is to cast to 'uintptr_t'. Fixes: d5a114a6c5f7 ("drm/amdgpu: Add GFXv9 kfd2kgd interface functions") Signed-off-by: Arnd Bergmann --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.9.0 Reviewed-by: Oded Gabbay diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c index 8f37991df61b..f0c0d3953f69 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c @@ -470,9 +470,9 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI), upper_32_bits(guessed_wptr)); WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR), - lower_32_bits((uint64_t)wptr)); + lower_32_bits((uintptr_t)wptr)); WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI), - upper_32_bits((uint64_t)wptr)); + upper_32_bits((uintptr_t)wptr)); WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1), get_queue_mask(adev, pipe_id, queue_id)); }