From patchwork Tue Oct 2 08:43:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 147962 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp4887606lji; Tue, 2 Oct 2018 01:43:56 -0700 (PDT) X-Google-Smtp-Source: ACcGV60VStLaAEVZfcvpF10f9XUM1Cm1YEXB72LRitARJEYVeLd1IxF6HPwepeEjeQw23gn1+hRw X-Received: by 2002:a17:902:585:: with SMTP id f5-v6mr15831385plf.7.1538469836262; Tue, 02 Oct 2018 01:43:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538469836; cv=none; d=google.com; s=arc-20160816; b=qxtWmAJkCGbe+oOlj0tRov1/vuF8HtRelmaYKlItvCQu7ClPXDzvvwCf/h4D22EJyo lgYyPox8ZcVPu3T0pmUw3MjULgWzfOQVX5jFR4hkk2YcQf9VIKOM4dKTT4bYQ0h6hF6l gy5NKst0rdcNSJulzvzzMvg4uic81rdSVTyp3tLYDiQni68Lr5Hq4Rl8wv1EaK9ISKmN 1EWJml/EEGfaWbU4EDthmByctGrPj6WHquF7egUS0g1hzOSHyO2ju0r4V46xe6hk/Zd6 y3GwIVc4AttMs/6psRMrB1jHrtHCMog6fJh4G05knEp7miRu+mKZNv0kneahsKyfeQLN nBww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=PKzH8oYKZ82Z9TWd7i02OlmOTFAJUgwk8t5GyaIR3Bc=; b=klkLczKrJuDwDIwoj9AdyiAVWqo2kQqd0TS9Sbt7k6ugEmEVaLIAAfd+mBXiDkgO7x vvL90z3alSVa0nmT0WEJ3o4zWrc4/0F+uE5WiNvHR1RIAVo6IcSy5M9b1/QICOZgIIpq 3XYwgjYnYW9TO+F0rcN9OptR97UoOCoKLhgeSxEZDlw3L1JHiIX+ZA7L4SBT1z7U882K N9ACwrKoqajXWaBTOa6EQQT6hhTsv0SuDxnXFn7epVDZlApBp7gZM0vdnhSVhFe5tp0s c0cVkKwejH7j8mtMxsgOHPW+Rv2VBJMetp/0wNktiisc0Oprz57wWy8jZegagRl0DApN 2Jig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="Fi/eYR8p"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g4-v6si14423910plb.484.2018.10.02.01.43.55; Tue, 02 Oct 2018 01:43:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="Fi/eYR8p"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727369AbeJBP0B (ORCPT + 32 others); Tue, 2 Oct 2018 11:26:01 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:53135 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726508AbeJBP0B (ORCPT ); Tue, 2 Oct 2018 11:26:01 -0400 Received: by mail-wm1-f65.google.com with SMTP id 189-v6so1351984wmw.2 for ; Tue, 02 Oct 2018 01:43:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PKzH8oYKZ82Z9TWd7i02OlmOTFAJUgwk8t5GyaIR3Bc=; b=Fi/eYR8pwykHWHOKpYSmKoc+0Wmlao7S1/rdIXXxB/GD9s7jVvZJ/5YovtSwd6Susj 6qPpJLPAat6p/M925sKVHsJ7RlM1rEdqOsIcEReJoHeXe8ee+vWhFA9ufBhrGzD12hgz FNWa4ZQjWu9hoIaYqSJDrYcCbFD4pqTa6hkkSCqxys29pNh0wuJ7tnuSvaFA8X/CfL6K mj+pyzR8NmAKsWveqZamci3eG932H1eUYbOu2f+QQYlYrYrU0ueUYphxwwS9r1/ds0nU 1V1zWZT3IPOf0jFgiSW0o3KxaWOq5E/MxzsRmAMqSjM8W6Fv7cXpzF9ThNqKOIJ9PYkV +EKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PKzH8oYKZ82Z9TWd7i02OlmOTFAJUgwk8t5GyaIR3Bc=; b=E4EzdSn+uRCXtlwzYRrI60wo0VvGbo2Z+3/b/dCRESlEJ05c1OfQ0sLT3scFhz3BJk sCASZKB3Lpl8FCryP3/L746zUo9gdvdiAG22MvBmVziFaD/Q+ybElH4XIA7pgepf2FdQ JIwg+99ce2VlOHiKqL1nvb5Pg22km9ILttIMwRnFM24MVmDG8NEqKgkxknLmy52I7m9D fhv0F6VdMX6ZwOeN9jc/nVTQz+dyKktCXmASi7LjiWIswgaUSBgEX8yjWPDkR5FTyflr o7UZ06JrrToI503p8JCjdENxVnro1um5Vu+PIn6kUe6l9yG4bpmbFmIoyQnJms/Es9dD 3GIA== X-Gm-Message-State: ABuFfogk6LHbq96qMmUvRbRgVh2oTfhapYd9hgEe6vvFzRWBrC+M4Dql w8K1mGDXSO4sdJ3kBbpXI9b4wg== X-Received: by 2002:a1c:ee0c:: with SMTP id m12-v6mr1209010wmh.112.1538469831403; Tue, 02 Oct 2018 01:43:51 -0700 (PDT) Received: from boomer.baylibre.local ([2a01:e34:eeb6:4690:3146:aafc:91d9:4b96]) by smtp.googlemail.com with ESMTPSA id 198-v6sm16162298wmm.0.2018.10.02.01.43.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 Oct 2018 01:43:50 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] arm64: dts: meson-axg: s400: disable emmc Date: Tue, 2 Oct 2018 10:43:41 +0200 Message-Id: <20181002084341.5487-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181002084341.5487-1-jbrunet@baylibre.com> References: <20181002084341.5487-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org While it is possible to rework the s400 board to solder an eMMC on it, it is not the default option and most boards are fitted with a NAND instead. Let's disable the emmc device by default to reflect this. The board equipped with an eMMC will just have to alter the DT in the bootloader, like we do for the reserved memory regions. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts index 166ab598395e..c74ff1efebb8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts @@ -479,7 +479,7 @@ /* emmc storage */ &sd_emmc_c { - status = "okay"; + status = "disabled"; pinctrl-0 = <&emmc_pins>; pinctrl-1 = <&emmc_clk_gate_pins>; pinctrl-names = "default", "clk-gate";