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[24.155.109.49]) by smtp.googlemail.com with ESMTPSA id u63-v6sm2904328ota.75.2018.10.05.09.59.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Oct 2018 09:59:03 -0700 (PDT) From: Rob Herring To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Cc: Grant Likely , Kumar Gala , Frank Rowand , Mark Rutland , Linus Walleij , Olof Johansson , Arnd Bergmann , Mark Brown , Tom Rini , Pantelis Antoniou , Geert Uytterhoeven , Jonathan Cameron , Bjorn Andersson , Dinh Nguyen Subject: [PATCH 10/36] dt-bindings: altera: Convert clkmgr binding to json-schema Date: Fri, 5 Oct 2018 11:58:22 -0500 Message-Id: <20181005165848.3474-11-robh@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181005165848.3474-1-robh@kernel.org> References: <20181005165848.3474-1-robh@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert Altera clkmgr to DT schema format using json-schema. Cc: Mark Rutland Cc: Dinh Nguyen Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring --- .../arm/altera/socfpga-clk-manager.txt | 11 ------- .../arm/altera/socfpga-clk-manager.yaml | 30 +++++++++++++++++++ 2 files changed, 30 insertions(+), 11 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt deleted file mode 100644 index 2c28f1d12f45..000000000000 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt +++ /dev/null @@ -1,11 +0,0 @@ -Altera SOCFPGA Clock Manager - -Required properties: -- compatible : "altr,clk-mgr" -- reg : Should contain base address and length for Clock Manager - -Example: - clkmgr@ffd04000 { - compatible = "altr,clk-mgr"; - reg = <0xffd04000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml new file mode 100644 index 000000000000..37c2cf08fae0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: None +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/arm/altera/socfpga-clk-manager.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera SOCFPGA Clock Manager + +maintainers: + - Dinh Nguyen +description: test + +properties: + compatible: + items: + - const: altr,clk-mgr + reg: + maxItems: 1 + +required: + - compatible + +examples: + - | + clkmgr@ffd04000 { + compatible = "altr,clk-mgr"; + reg = <0xffd04000 0x1000>; + }; + +...