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[209.132.180.67]) by mx.google.com with ESMTP id k8-v6si21230350pgj.192.2018.10.31.23.19.40; Wed, 31 Oct 2018 23:19:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Snm6SDTS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727819AbeKAPVK (ORCPT + 32 others); Thu, 1 Nov 2018 11:21:10 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:35757 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727800AbeKAPVJ (ORCPT ); Thu, 1 Nov 2018 11:21:09 -0400 Received: by mail-pl1-f195.google.com with SMTP id n4-v6so7869089plp.2 for ; Wed, 31 Oct 2018 23:19:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZvL9JXPkSCEpU6IxoDs/WZI6AFU5ENywXz2f9GrqSf8=; b=Snm6SDTSaQ/l9o/BDxsYhovdRRy7N0i5fR2cZZfef37nN9PjGnA+rMCdnX6RsyCAlD ZymcH1BGFDclxRrORDjM168L+4PvtuDJmGFfDg6L850rocpCHBeS+b1WSNiGevOhkFbg BWYlFz/1JLjexGEEJ/jZXIwaXpN8LIokdaVzY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZvL9JXPkSCEpU6IxoDs/WZI6AFU5ENywXz2f9GrqSf8=; b=ljKWrD8LcmYxoAXtXqeQWIjAx4DDWZax0kaVYUcsSUbPDoKINOSEGLhSE/vjYEC4lC z0AkE6VsRMHnbx5e2m+p7tx3i+oWgxlazfPC+rrLNuiQF6IT2/gvyhS7Ei+/gZs6KgvQ tMgcMZYNhaCoVkGudC7h81dG7Fc2DxbpUM178n++3MAVbHmMqaXXdr6M5KgXEK+dDHVU xadDdV7xOY11IDQ6rf3Hma7VzqsAqf2O2iB+tpuQTMMwp2mwjQVbMA87M7Z+794MvIub aCeh9polYtLj6SyuFvFDQgR0c8y5nra6RwR3laK/Rgr7fOop7Cnt68Eg5P/8WkpnPEUm wBWg== X-Gm-Message-State: AGRZ1gKsmoYbsVynFhuVW8C0mHG+tb/CgngYU1a8wnEL78AjyjoTRwyr jWrfiv5FA/q5sAGYZvgpqnIr X-Received: by 2002:a17:902:9698:: with SMTP id n24-v6mr6625515plp.9.1541053174418; Wed, 31 Oct 2018 23:19:34 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:900:77c6:7824:4800:6aa6:75b4]) by smtp.gmail.com with ESMTPSA id u190-v6sm71346726pgu.3.2018.10.31.23.19.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 31 Oct 2018 23:19:33 -0700 (PDT) From: Manivannan Sadhasivam To: sean.wang@mediatek.com, linus.walleij@linaro.org, matthias.bgg@gmail.com, robh+dt@kernel.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, amit.kucheria@linaro.org, Manivannan Sadhasivam Subject: [PATCH v2 2/4] arm64: dts: mediatek: mt6797: Add pinctrl support Date: Thu, 1 Nov 2018 11:49:05 +0530 Message-Id: <20181101061907.20224-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181101061907.20224-1-manivannan.sadhasivam@linaro.org> References: <20181101061907.20224-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add pinctrl support for Mediatek MT6797 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/mediatek/mt6797.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi index 4beaa71107d7..231230d32d09 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6797.dtsi @@ -14,6 +14,7 @@ #include #include #include +#include / { compatible = "mediatek,mt6797"; @@ -129,6 +130,19 @@ #clock-cells = <1>; }; + pio: pinctrl@10005000 { + compatible = "mediatek,mt6797-pinctrl"; + reg = <0 0x10005000 0 0x1000>, + <0 0x10002000 0 0x400>, + <0 0x10002400 0 0x400>, + <0 0x10002800 0 0x400>, + <0 0x10002C00 0 0x400>; + reg-names = "gpio", "iocfgl", "iocfgb", + "iocfgr", "iocfgt"; + gpio-controller; + #gpio-cells = <2>; + }; + scpsys: scpsys@10006000 { compatible = "mediatek,mt6797-scpsys"; #power-domain-cells = <1>;