From patchwork Mon Nov 19 21:18:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 151521 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3185145ljp; Mon, 19 Nov 2018 13:20:49 -0800 (PST) X-Google-Smtp-Source: AJdET5drhDd2jsrMv2wyphATBFBBc1VpCi+DIN0W/PucuNORDLpcs05/0/vV0SxlCwrpz+uRNbHl X-Received: by 2002:a17:902:108a:: with SMTP id c10-v6mr23480597pla.171.1542662449576; Mon, 19 Nov 2018 13:20:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542662449; cv=none; d=google.com; s=arc-20160816; b=x7LrWlXJnyMUK0qwhO5jfcgRpWRMe/njQcHV7blyjB6nBGsL+AVfQ1Ibph+CO02mFc BInjVgXoQCIG8QGVk3vTZ1Ffk4XmwbFjU2fmTG90WiaiKNhEn5ELLwrrTMWKmTZq9f2u apz1B1QLpidd0Layz21tnuzh7YQQ684Z8sXqWIExCFvIzRepw74FPBSW5R7z6PCWvJl2 GQr58gB3OJDoA2/EPyYKqNv9qkkMlB1/K9lg9gXqp+BfdEtQJmwQcRuMiK2K31uYq/sR F4Ro2atuuwJBHuxcGFd/iYFeh5dnkuO7YK3DvWJgiGNbEJdfovy8fGrvcTIk60j+haJO YJkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=w/8MAiu9LlMbzyqiJijK4E/5JkrIzILwfrYL0HnfzFc=; b=pJjzUNaop1r9JyyOmp1RwHe4/E8aMWXYgQu+O038Nb+5g+H1w7zZj8YcvtCh7jcycr 5MEb00HLCD4o3awHUZ5YStR2LK3EkGG3DuJD9jOk5+nWFpbJ2XG6ltltOP8FEYKbis2H W/oBzu03Ng91l7Jb6w+k3rXH8MCv15IvTXzDvqJocp8IfmgtbMc43H8+MdLHIjp6mHH9 DUQz3WAXP2bchYp5MFCXwwqCKuaLgYUgykTgoURiJmDNAsvn/fY5swZuZNcktBIpvsgz G+uhAypmGMkB8a6m+UvCUKR3W9Hr5rV/qKcaagUp9HEWUO1PXOwcrkBb6G3Y8IOVTbeQ Fw8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f184-v6si34080743pfb.252.2018.11.19.13.20.49; Mon, 19 Nov 2018 13:20:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731053AbeKTHqS (ORCPT + 32 others); Tue, 20 Nov 2018 02:46:18 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:14685 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730790AbeKTHqS (ORCPT ); Tue, 20 Nov 2018 02:46:18 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id E40BC4CB6F111; Tue, 20 Nov 2018 05:20:43 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.88.214) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.408.0; Tue, 20 Nov 2018 05:20:33 +0800 From: Salil Mehta To: CC: , , , , , , , liuzhongzhu Subject: [PATCH net-next 2/8] net: hns3: Add "queue info" query function Date: Mon, 19 Nov 2018 21:18:39 +0000 Message-ID: <20181119211845.23168-3-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181119211845.23168-1-salil.mehta@huawei.com> References: <20181119211845.23168-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.88.214] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: liuzhongzhu Query the queue information of the current NIC such as BD size, queue header and tail pointer. This patch adds support for debugfs command: echo queue info 1 > cmd it can print queue config information... root@(none)# echo queue info 1 > cmd hns3 0000:7d:00.0: queue info hns3 0000:7d:00.0: RX(1) BASE ADD: 0x00000000ffb58000 hns3 0000:7d:00.0: RX(1) RING BD NUM: 127 hns3 0000:7d:00.0: RX(1) RING BD LEN: 2 hns3 0000:7d:00.0: RX(1) RING TAIL: 120 hns3 0000:7d:00.0: RX(1) RING HEAD: 0 hns3 0000:7d:00.0: RX(1) RING FBDNUM: 0 hns3 0000:7d:00.0: RX(1) RING PKTNUM: 0 hns3 0000:7d:00.0: TX(1) BASE ADD: 0x00000000fffd8000 hns3 0000:7d:00.0: TX(1) RING BD NUM: 127 hns3 0000:7d:00.0: TX(1) RING TC: 0 hns3 0000:7d:00.0: TX(1) RING TAIL: 2 hns3 0000:7d:00.0: TX(1) RING HEAD: 2 hns3 0000:7d:00.0: TX(1) RING FBDNUM: 0 hns3 0000:7d:00.0: TX(1) RING OFFSET: 0 hns3 0000:7d:00.0: TX(1) RING PKTNUM: 0 root@(none)# Signed-off-by: liuzhongzhu Signed-off-by: Salil Mehta --- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 122 ++++++++++++++++++ 1 file changed, 122 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 9bc6ceb6fbc1..04b0789d439d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -11,6 +11,120 @@ static struct dentry *hns3_dbgfs_root; +static int hns3_dbg_queue_info(struct hnae3_handle *h, char *cmd_buf) +{ + struct hns3_nic_priv *priv = h->priv; + struct hns3_nic_ring_data *ring_data; + struct hns3_enet_ring *ring; + u32 base_add_l, base_add_h; + u32 queue_num, queue_max; + u32 value, i = 0; + int cnt; + + if (!priv->ring_data) { + dev_err(&h->pdev->dev, "ring_data is NULL\n"); + return -EFAULT; + } + + queue_max = h->kinfo.num_tqps; + cnt = kstrtouint(&cmd_buf[11], 0, &queue_num); + if (cnt) + queue_num = 0; + else + queue_max = queue_num + 1; + + dev_info(&h->pdev->dev, "queue info\n"); + + if (queue_num >= h->kinfo.num_tqps) { + dev_err(&h->pdev->dev, + "Queue number(%u) is out of range(%u)\n", queue_num, + h->kinfo.num_tqps - 1); + return -EINVAL; + } + + ring_data = priv->ring_data; + for (i = queue_num; i < queue_max; i++) { + /* Each cycle needs to determine whether the instance is reset, + * to prevent reference to invalid memory. And need to ensure + * that the following code is executed within 100ms. + */ + if (test_bit(HNS3_NIC_STATE_INITED, &priv->state) || + test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) + return -EPERM; + + ring = ring_data[i + h->kinfo.num_tqps].ring; + base_add_h = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BASEADDR_H_REG); + base_add_l = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BASEADDR_L_REG); + dev_info(&h->pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i, + base_add_h, base_add_l); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BD_NUM_REG); + dev_info(&h->pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BD_LEN_REG); + dev_info(&h->pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_TAIL_REG); + dev_info(&h->pdev->dev, "RX(%d) RING TAIL: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_HEAD_REG); + dev_info(&h->pdev->dev, "RX(%d) RING HEAD: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_FBDNUM_REG); + dev_info(&h->pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_PKTNUM_RECORD_REG); + dev_info(&h->pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value); + + ring = ring_data[i].ring; + base_add_h = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_BASEADDR_H_REG); + base_add_l = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_BASEADDR_L_REG); + dev_info(&h->pdev->dev, "TX(%d) BASE ADD: 0x%08x%08x\n", i, + base_add_h, base_add_l); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_BD_NUM_REG); + dev_info(&h->pdev->dev, "TX(%d) RING BD NUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_TC_REG); + dev_info(&h->pdev->dev, "TX(%d) RING TC: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_TAIL_REG); + dev_info(&h->pdev->dev, "TX(%d) RING TAIL: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_HEAD_REG); + dev_info(&h->pdev->dev, "TX(%d) RING HEAD: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_FBDNUM_REG); + dev_info(&h->pdev->dev, "TX(%d) RING FBDNUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_OFFSET_REG); + dev_info(&h->pdev->dev, "TX(%d) RING OFFSET: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_PKTNUM_RECORD_REG); + dev_info(&h->pdev->dev, "TX(%d) RING PKTNUM: %u\n\n", i, + value); + } + + return 0; +} + static void hns3_dbg_help(struct hnae3_handle *h) { dev_info(&h->pdev->dev, "available commands\n"); @@ -51,6 +165,7 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, size_t count, loff_t *ppos) { struct hnae3_handle *handle = filp->private_data; + struct hns3_nic_priv *priv = handle->priv; char *cmd_buf, *cmd_buf_tmp; int uncopied_bytes; int ret = 0; @@ -58,6 +173,11 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, if (*ppos != 0) return 0; + /* Judge if the instance is being reset. */ + if (test_bit(HNS3_NIC_STATE_INITED, &priv->state) || + test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) + return 0; + cmd_buf = kzalloc(count + 1, GFP_KERNEL); if (!cmd_buf) return count; @@ -78,6 +198,8 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, if (strncmp(cmd_buf, "help", 4) == 0) hns3_dbg_help(handle); + else if (strncmp(cmd_buf, "queue info", 10) == 0) + ret = hns3_dbg_queue_info(handle, cmd_buf); if (ret) hns3_dbg_help(handle);