| Message ID | 20190325083501.8088-8-kishon@ti.com |
|---|---|
| State | Accepted |
| Commit | 1c55c4263fe76f1a65b198787495c7f5f9e48002 |
| Headers | show
Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp3696198jan; Mon, 25 Mar 2019 01:36:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqxpcIcCfFseuBlzgPC6IRJxHqAaA778bmbh5qKsIxUmo3aFyyHY97frCY76KpEIGf0DSd+x X-Received: by 2002:a63:f74c:: with SMTP id f12mr21933327pgk.124.1553503005553; Mon, 25 Mar 2019 01:36:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553503005; cv=none; d=google.com; s=arc-20160816; b=e7gIaBY1saKB3b9LlubcuPkmIS3sRzWeBv10cFAGADK5mhlAkC/c0ZgNMi5vFPEN76 erqBqR2sepbeg7jeVppPhW+LMCgUDtb0f3XH9nTVS/R8hrrf4X/qoqMuddFzbhcUPv/b 9WShk9R+P/3sJ6yeezyB3AgvWOmUUxiWtc/BZMqUnmpCNU/tRzmoZbu5oGa+rypaKosX YSIcygwSevOQ+9cEpIp5TgZARdWfxsAfRG/AMYllsrxAB6XuScTYckeuuJ994h/dBdF7 KdPZLNyY6rUMa33vbg5J+aG36+GGUxqiqJoNgWH5oKJLTY2IxrlF4CvTHzP32e2vK46T n5Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Oy9h1kP8jbCXe+8kD93AkYommSwhxCLq/ir/s6HONHk=; b=jpfebaEd9OWpIs+HQJO72y5vn1T9x/WjxtAXUhi94l06JkNt8cNY1vFGgM0DRLV8VU WO2huHD2jPiZBcpbiWRYBNH62p22zTAm678odyzOkH4ciwUTO5f5KljzbeylHJ+EHpnc UeQT0sHEPzpSWINJODEadWs7iaT8SW665uIcCuWCPwSJ6YmLCC43qUb4cZQTByo+hcOo jOsOCtireUPk/XZdB/Ya02QugTwM3LL/E7Di9a3tNPHBl/0tYn9FvZolp+IhUCyqirpa n78JFi0aubwgPDoZx4a4Tft1GpSinyFnNrOrxbSpIqtuCMo/njC6PSlBMH2LKgRCCnOe HTAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U1BIFWrX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: <linux-kernel-owner@vger.kernel.org> Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l4si12082288pgp.169.2019.03.25.01.36.45; Mon, 25 Mar 2019 01:36:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U1BIFWrX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730192AbfCYIgo (ORCPT <rfc822;mike.holmes@linaro.org> + 31 others); Mon, 25 Mar 2019 04:36:44 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:36554 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730134AbfCYIgm (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 25 Mar 2019 04:36:42 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2P8aSxt039478; Mon, 25 Mar 2019 03:36:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553502988; bh=Oy9h1kP8jbCXe+8kD93AkYommSwhxCLq/ir/s6HONHk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=U1BIFWrX3hWD/vzw9F+WeAfnBbN+F4NPqE4IWb09VOY2EOWHjFkx5qS7Qt2DQWMUx NXlOdPfjWNNYim4j/q9NGZx4qwGpIYBsjZIWLW5/bsYjCLZLkvIeF/KlwqUJnCLEkf Ql91tG7fCBQMIiHgWIkHA1Bj6eqcWu4i92oEOmVU= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2P8aS1Y091801 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 25 Mar 2019 03:36:28 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 25 Mar 2019 03:36:28 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Mon, 25 Mar 2019 03:36:28 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2P8ZsFn006534; Mon, 25 Mar 2019 03:36:24 -0500 From: Kishon Vijay Abraham I <kishon@ti.com> To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Arnd Bergmann <arnd@arndb.de>, Murali Karicheri <m-karicheri2@ti.com> CC: Kishon Vijay Abraham I <kishon@ti.com>, Jingoo Han <jingoohan1@gmail.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-arm-kernel@axis.com> Subject: [PATCH v2 07/26] dt-bindings: PCI: Add dt-binding to configure PCIe mode Date: Mon, 25 Mar 2019 14:04:42 +0530 Message-ID: <20190325083501.8088-8-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190325083501.8088-1-kishon@ti.com> References: <20190325083501.8088-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org |
| Series |
Add support for PCIe RC and EP mode in TI's AM654 SoC
|
expand
|
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt index 3a551687cfa2..8ee07197a063 100644 --- a/Documentation/devicetree/bindings/pci/pci-keystone.txt +++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt @@ -23,6 +23,8 @@ pcie_msi_intc : Interrupt controller device node for MSI IRQ chip ti,syscon-pcie-id : phandle to the device control module required to set device id and vendor id. +ti,syscon-pcie-mode : phandle to the device control module required to configure + PCI in either RC mode or EP mode. Example: pcie_msi_intc: msi-interrupt-controller {
Add "ti,syscon-pcie-mode" dt-binding to hold phandle to the syscon register that should be used to configure PCIe in RC mode or EP mode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- Documentation/devicetree/bindings/pci/pci-keystone.txt | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1