From patchwork Mon Mar 25 09:39:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 161073 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp3751206jan; Mon, 25 Mar 2019 02:44:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqyBPGR+/Pr4LRgayg0Qgq9NZwNm6Vb/6bZn/hHi4yzC+iE0vEhAAMv2+oBr2h8yzOO/n+/a X-Received: by 2002:a17:902:b210:: with SMTP id t16mr969540plr.84.1553507065490; Mon, 25 Mar 2019 02:44:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1553507065; cv=none; d=google.com; s=arc-20160816; b=zz4Xbuu7P8XWf3uVT5MwFbJHzbBtC6GeYjohRj4Mrvs0mR5cuSEI91QrxrRfIb5dxZ zi7U7+IjrDO9jyUowJIdLb1bJlSrDJiPjxfaLBzwstDgefsU+saFj6JqEsXGXtVfhzpk eMd4syF2gCnceiS3lL+QSDRHCIcZl9y+QornYxPSUf2TtOqzTr2xqBT/v7wVzx3MxKKU cGXCT3Vm6hvU8LpwCnLBFIikapluwLwyPWqUtcZUxq5YqzIO2g/YO4JGvXAooFkAWZ1W qqkA5Dag/DOW8NzwUhdGMFa33RhkK+fKuroajLHfz0JYzflc2tz2eitRFTOA6ais6sNu 85ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ecY/+Ui4SK2VPooZ8MRoP5X7hto+xBrP5+SVRZo/EkI=; b=Gju37RMd9pLxAxeNE7xhPH+wMCYFj5b8Xr0sKUpO05xPXlsChaRp91zT09IsLhqssf C+RcN3b5QRvfov1+ghOrYJIAfY9nWLaMQuWJuYXMRatMcx6hS5XsVVwtBLhJB26yrO5t 9OtaNH2keuBt6/hgYv7mOk2J9XonaNzyWKzgRDk0SAVlL3DEXptjq+kDVnEdQ97nQhJ5 Pe8EONjXeQ89QF3Cg4eKD9a42QSzQqh4hPA/kJ5Ge7XNyQlIOktVnLHrcFkDBv0YCwd7 b92DpCXfgMS/IZukyv/oKflualUas7Vs6YozUMVFGu7HOh1AegfUa8tR7jTH31e84EuD UuuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=QI2e4DOd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e2si13188504pgs.387.2019.03.25.02.44.25; Mon, 25 Mar 2019 02:44:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=QI2e4DOd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730530AbfCYJoX (ORCPT + 31 others); Mon, 25 Mar 2019 05:44:23 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:37788 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730810AbfCYJoT (ORCPT ); Mon, 25 Mar 2019 05:44:19 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x2P9i3bg013630; Mon, 25 Mar 2019 04:44:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1553507043; bh=ecY/+Ui4SK2VPooZ8MRoP5X7hto+xBrP5+SVRZo/EkI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QI2e4DOdMrnzxiGAiwFTboYR0mKzar6nFJ4DmJjfdCATaCNs7vRXHZ/qmdDLWV8va dzFASKWIDlSrhfd9BVFbcSyWJfX2ctJc38fsSZLu1xViwqvTT0KSFgoZJpp4gvzwP9 XzXl3/rCTte832QFKgswKYYIudZodf72JZx2H7OE= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x2P9i32b112003 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 25 Mar 2019 04:44:03 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 25 Mar 2019 04:44:02 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1713.5 via Frontend Transport; Mon, 25 Mar 2019 04:44:02 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x2P9feae028077; Mon, 25 Mar 2019 04:43:57 -0500 From: Kishon Vijay Abraham I To: Gustavo Pimentel , Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Arnd Bergmann , Murali Karicheri CC: Kishon Vijay Abraham I , Jingoo Han , Greg Kroah-Hartman , , , , , , , Minghuan Lian , Mingkai Hu , Roy Zang , Jesper Nilsson Subject: [PATCH v3 25/26] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Date: Mon, 25 Mar 2019 15:09:46 +0530 Message-ID: <20190325093947.32633-26-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190325093947.32633-1-kishon@ti.com> References: <20190325093947.32633-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to application registers. "PCIe Inbound Address Translation" section in AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 is reserved. Configure pci_endpoint_test to use BAR_2 instead. Also set alignment to 64K since "PCIe Subsystem Address Translation" section in TRM indicates minimum ATU window size is 64K. Signed-off-by: Kishon Vijay Abraham I --- drivers/misc/pci_endpoint_test.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.17.1 diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 29582fe57151..e015e8fa9bd3 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -75,6 +75,11 @@ #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28 +#define PCI_DEVICE_ID_TI_AM654 0xb00c + +#define is_am654_pci_dev(pdev) \ + ((pdev)->device == PCI_DEVICE_ID_TI_AM654) + static DEFINE_IDA(pci_endpoint_test_ida); #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \ @@ -588,6 +593,7 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd, int ret = -EINVAL; enum pci_barno bar; struct pci_endpoint_test *test = to_endpoint_test(file->private_data); + struct pci_dev *pdev = test->pdev; mutex_lock(&test->mutex); switch (cmd) { @@ -595,6 +601,8 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd, bar = arg; if (bar < 0 || bar > 5) goto ret; + if (is_am654_pci_dev(pdev) && bar == BAR_0) + goto ret; ret = pci_endpoint_test_bar(test, bar); break; case PCITEST_LEGACY_IRQ: @@ -785,11 +793,20 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev) pci_disable_device(pdev); } +static const struct pci_endpoint_test_data am654_data = { + .test_reg_bar = BAR_2, + .alignment = SZ_64K, + .irq_type = IRQ_TYPE_MSI, +}; + static const struct pci_device_id pci_endpoint_test_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x) }, { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x) }, { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) }, { PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0xedda) }, + { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654), + .driver_data = (kernel_ulong_t)&am654_data + }, { } }; MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);