From patchwork Thu Apr 25 12:55:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 162850 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1898935jan; Thu, 25 Apr 2019 05:55:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqx/p2hStqJhbBD+QiwIw2G2aTWq4zvAhMxm2ge8Pj0qC2qBvfJGMUNsvSCqBg/bznVmqZ61 X-Received: by 2002:a17:902:5a8f:: with SMTP id r15mr5272651pli.196.1556196930714; Thu, 25 Apr 2019 05:55:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556196930; cv=none; d=google.com; s=arc-20160816; b=RHm7EnIK2+nBoFkYhhyaZsq8v0hJo1uhqKTXl+c9MkzgYLnjepKDpU/BkGs+KZb98Q N7PufX7CnUN4BzerfFvtjlyeN4/pRrW3g8hBfp+UyD5qVwZkDrPn3YUEeepfOa/Dr8dD BFk4ZdqH4qzbCv5l6sjJ+pn83SyTPfX1Ko4fuOG2KM45sqU7zJzHdRYmufdxugigYZ5y s2XYFCR187oP+JgI68thZf9beQ55Y7d7/gsnqixc/xemR3YuXWqPTT4r0nXQC3TM5JOV wAbH/CyU3gqGTJghBi5yyvZHqs8CikOzKXnBFJRMqhuzLgyLFZ8bR46jBhCf3SrIzIVP THYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=lN7d9AFnCFsQoNto1MmoxFEaROcLbNByuK9LsqS8Ur8=; b=OytICLkzrAkmOZ0swrRBK1BNx9w9R1zogaqbhCu2WGMd55BUu1zmBT2jGYMc2GYfkd HECMgxPHU9exfpNu9f89GE8ew9DHsjRWxPxZsxOOkOxr3EBX1+EKT9RWzGEPIW7XnDkH GV6EVQ+1xFaKWaP8RgqSFPb2IRkL55MBu7JMQFNA43w6cCPN5JeOqEh1Sa0G3Uj4uX9n FXqsyddF6bfIrd7bua6BK4JGHurejEKxq9mE24VUjb3Lq3ePApjGd+JS+7ZcupF/bifj sQL7jll91JFG3KFaGm5ozKoJUPXtijwYDEdnVrWy4QqZfyFd7MPKnTXarvO1L+P7idN2 Qi7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Hn86/R8n"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d1si15130743plo.9.2019.04.25.05.55.30; Thu, 25 Apr 2019 05:55:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Hn86/R8n"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728916AbfDYMz3 (ORCPT + 30 others); Thu, 25 Apr 2019 08:55:29 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:41965 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726272AbfDYMz2 (ORCPT ); Thu, 25 Apr 2019 08:55:28 -0400 Received: by mail-pf1-f194.google.com with SMTP id 188so11139544pfd.8 for ; Thu, 25 Apr 2019 05:55:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lN7d9AFnCFsQoNto1MmoxFEaROcLbNByuK9LsqS8Ur8=; b=Hn86/R8nm2cPg8z7qwJKKGxmsB4+pd5l8wrKGLq6KKtB5SMjb0MDI2di/dDTWopvkA yVd01k0BpGGpkduRV6wS4ymMA0kEZsFgi//EhuemiDW593jFbP2feJuo1LgbjVHZfe1G xYxHzfFXOnzHb2u9QjlFS0q6q+nRmW+bq5Wca50/14VKltyGsRhuw6vqT4VIvLHWQAZP BPTWp0eEX9zh6N+e09vul5j5F0DJm/lMCHmyiBwCRclNUEaNXvCoAI9VkOwS9fDgeQsi cazf+WCiupdt1UWhvbn5xxzAK91D3oWyfg2goGG08iqnuGd1TKbyud4WyyFSjLXbxfH1 TSqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lN7d9AFnCFsQoNto1MmoxFEaROcLbNByuK9LsqS8Ur8=; b=Ucgl8DA+7mSdzSV2Ksv0d7K2R4Pl1plYh9xm2/zrwqtLzLmxpWdXzKRn5KlUtdGaLh GJKIFpr8h7KS7mwNbCHsngjgM6VPOFtziUUsMYrTsR9GiQHYafG9Fy/qd/9Yi21FXh1m yAKj34cVppupGIHnUQMY2ikqA+xBzi35Lw6JHqW3f7qTWIqo29MGqU38PARSDO2FbvDP 466sS1AR7Xx0qG9jwHGMSwu0psBukkJ1HCBD6KaL4o4BwBS1kZIgAG09LKZJ38gLyxxe +Wi5PN1OiU1U/Kb5TIRXO8Y1t26xp6AEFpHaGZ4LOOhWyLuKHr0T6s0EyfOa4vg1p5Fu fRbw== X-Gm-Message-State: APjAAAU4f8I4dIZ7HWBtZf3gFsXw7e/2J5TYzJ4DxlOK7Gv6uQsFIulP RpYMrXHlchIErkju0Za1tMQk X-Received: by 2002:a65:648c:: with SMTP id e12mr36987444pgv.346.1556196928150; Thu, 25 Apr 2019 05:55:28 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:81e:2691:7d48:1fca:4d86:743]) by smtp.gmail.com with ESMTPSA id c18sm50507983pfc.0.2019.04.25.05.55.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 05:55:27 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, robh+dt@kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, haitao.suo@bitmain.com, darren.tsao@bitmain.com, Manivannan Sadhasivam Subject: [PATCH 2/3] arm64: dts: bitmain: Add reset controller support for BM1880 SoC Date: Thu, 25 Apr 2019 18:25:07 +0530 Message-Id: <20190425125508.5965-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190425125508.5965-1-manivannan.sadhasivam@linaro.org> References: <20190425125508.5965-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add reset controller support for Bitmain BM1880 SoC. This SoC has two reset controllers, each controlling reset lines of different peripherals. This commit also adds reset support to UART peripherals. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/bitmain/bm1880.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi index fdfdc65d29ef..37ecb760a2d2 100644 --- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi +++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi @@ -5,6 +5,7 @@ */ #include +#include / { compatible = "bitmain,bm1880"; @@ -92,6 +93,18 @@ compatible = "bitmain,bm1880-pinctrl"; reg = <0x50 0x4B0>; }; + + clk_rst: reset-controller@800 { + compatible = "bitmain,bm1880-reset"; + reg = <0x800 0x8>; + #reset-cells = <1>; + }; + + rst: reset-controller@C00 { + compatible = "bitmain,bm1880-reset"; + reg = <0xC00 0x8>; + #reset-cells = <1>; + }; }; uart0: serial@58018000 { @@ -100,6 +113,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; + resets = <&rst BM1880_RST_UART0_1_CLK>; status = "disabled"; }; @@ -109,6 +123,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; + resets = <&rst BM1880_RST_UART0_1_ACLK>; status = "disabled"; }; @@ -118,6 +133,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; + resets = <&rst BM1880_RST_UART2_3_CLK>; status = "disabled"; }; @@ -127,6 +143,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; + resets = <&rst BM1880_RST_UART2_3_ACLK>; status = "disabled"; }; };