From patchwork Fri Jul 12 09:07:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 168916 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp598115ilk; Fri, 12 Jul 2019 02:07:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqw4XUesce4+q2ejnDVXxd+8kTG1XTXJMBdMucNTwWr1XJQmQy1L6JKh/mMzP27TaxXHiRCF X-Received: by 2002:a63:b904:: with SMTP id z4mr9360126pge.388.1562922465230; Fri, 12 Jul 2019 02:07:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562922465; cv=none; d=google.com; s=arc-20160816; b=pTNAyrk8n1QrAM69tp0PZIa7iRLaBLKlOkZX/Bkxw6nKChMjQNd/Hwr1g4czNNB4bv /NElxeyyLThWL6zgcv5mYdz4hgI1vExHNHMNvk2MzNeJ09Dno0XutRmGh8nkPEKKh0wm /2Zs7DxLmVHK7VKTsuAa6CBQXdK2AjnEDCit8S34NfDe4d4iytZkRahmaBcUiSIh8DwW /xaH7DESAp4zuHIYifqBrzq8aUIp7JS4UXhvZx+wk3LCQPHo8Oj5RU9x0h6XXe7+ADgm 3K1dZd3LXV8D0pPF/dCf8SGWoa57xkW8u589ydA9hWeEcONX826eMDKTzfRptrGWKmRW eNKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=UMY29x+tanLxJUfgz+ScigICnvoaB93h5C64uIjAoUY=; b=g0N2wzzkGubV/YiZ7hfn5DtDBHZe5eFjp920lbCHKwIrqI3OY5XCFe7KTzrftVLQAq vaypKuxtuk970fZf6qV06wlDUM2Vkod+2EW6pDJVJiw1KkYHbMvmyf9XnQtirYfIKbWr UFuYAjW446d8/zEdMS4evhilkEet81/tu+5hMRQKoTqlLZiWX583biPQOWND1y0FwJId jbE8A4OxOwkAC2k51ANtbXi5zwriX4FmlU4caLIVnW4kZTM9fd/WVUW5fwZubNfLuqiw 7+Ymkvxq3VWUjLZgN+o+1s3YH01YUUVVveA7yRx8kJ1W8GQUd/1NomGE9lZ00B0+42y5 TEoQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g190si7355803pgc.131.2019.07.12.02.07.44; Fri, 12 Jul 2019 02:07:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726492AbfGLJHn (ORCPT + 29 others); Fri, 12 Jul 2019 05:07:43 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:41329 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726401AbfGLJHn (ORCPT ); Fri, 12 Jul 2019 05:07:43 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MWR6x-1hxf5K14xf-00XsqW; Fri, 12 Jul 2019 11:07:41 +0200 From: Arnd Bergmann To: Andrew Morton Cc: Arnd Bergmann , linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com Subject: [PATCH] lib/mpi: fix building with 32-bit x86 Date: Fri, 12 Jul 2019 11:07:34 +0200 Message-Id: <20190712090740.340186-1-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 MIME-Version: 1.0 X-Provags-ID: V03:K1:oshOUE/i3SB/+6j50OZzcgZaoU8IfG0hYfG87EvVrAoYQhBFCPj TYXcsD3c36xAYC+HbHBgw4TgevC2UdWi6oHQX7AL6pnoh6y+hvIRMl3Q0Mf9Aul4Mm7W4Fu j9PumrWVK4JrtKZDt8ChnFkB4vkMlznKcVJXeFtICQ9YCj0ckdi2R0xUkVnzLB7TBzZSwvq tvSKL//VB4vGstTl1rdJw== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:E7yiX+Q7/mY=:byTXnfUAj5/OJR3X6n4+7O JpZrOENWt75JJxW99jNUg8wMyY2aQzrHrnDhUg+LIzQcAsJlfSsqfK15iIgYD4Y4cWVIZdYaK Xhn0RyaspVrksHOZIV6mDJbVyGQ7lN4wdpH+f5Y+aR4NcnO9cLX/r+PSED3vGcqYSo4asqnmn 1M5rro6KQqttjjDXcidfu3jsK5WswGYeHpZ9fI+wZ1vWu68sk4Q+kKxtQdUzVDb9sXixnaLaf ZD5ib0U5KAjiZ7BMmwNFm1knxWEjxl3aisoDAn8dwxLIx3yBarUpBDsLnJGwE+qcWabQusJlI DjeFXYgJQmHiKWw5bIMBTA+jpzcOi9x8e7mm1P8v6g42NExrbfOhddLorlld0CzcNPBMkQ4R5 uBNF/SixDQLbP9hw91nohqeShQp41NT9QmZ7Ub797INqBQoKIUX9IFw4ipOSlcI2wTRYGHUQ8 fPotyEK+sNhrnNYLsvFXma8sM9MDDqFUPaNBOO5ghswuiQCvRytkYTVF5OILaTRzXPSqBeyfx 5pU37sQS6a6lupJX+J6TrAQTDKiA1NmgVwuDNJfHhkBGjX5cnLsPwAlLyZV4YINpd3MubwC6r BrfOVS2AMzLvmPsxD1qv+DE+6rhR/5lPJ3JL8plT+MV/Cvf+rDAmyszBwFbUqZpGEBQmhB8Y0 N+Q1y0UnvDjFOk+o2uM65LKaWsWvmiqf7HcjBOpzN8bX3eeA264xK5bX0JKIjXFSYMvwT6zSy Obt4URscfAdBKyzZSgVzRZQVIoilAKe7Uliv8A== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mpi library contains some rather old inline assembly statements that produce a lot of warnings for 32-bit x86, such as: lib/mpi/mpih-div.c:76:16: error: invalid use of a cast in a inline asm context requiring an l-value: remove the cast or build with -fheinous-gnu-extensions udiv_qrnnd(qp[i], n1, n1, np[i], d); ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ lib/mpi/longlong.h:423:20: note: expanded from macro 'udiv_qrnnd' : "=a" ((USItype)(q)), \ ~~~~~~~~~~^~ There is no point in doing a type cast for the output of an inline assembler statement, so just remove the cast here, as we have done for other architectures in the past. See-also: dea632cadd12 ("lib/mpi: fix build with clang") Signed-off-by: Arnd Bergmann --- lib/mpi/longlong.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -- 2.20.0 Reviewed-by: Nick Desaulniers diff --git a/lib/mpi/longlong.h b/lib/mpi/longlong.h index 08c60d10747f..3bb6260d8f42 100644 --- a/lib/mpi/longlong.h +++ b/lib/mpi/longlong.h @@ -397,8 +397,8 @@ do { \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("addl %5,%1\n" \ "adcl %3,%0" \ - : "=r" ((USItype)(sh)), \ - "=&r" ((USItype)(sl)) \ + : "=r" (sh), \ + "=&r" (sl) \ : "%0" ((USItype)(ah)), \ "g" ((USItype)(bh)), \ "%1" ((USItype)(al)), \ @@ -406,22 +406,22 @@ do { \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ __asm__ ("subl %5,%1\n" \ "sbbl %3,%0" \ - : "=r" ((USItype)(sh)), \ - "=&r" ((USItype)(sl)) \ + : "=r" (sh), \ + "=&r" (sl) \ : "0" ((USItype)(ah)), \ "g" ((USItype)(bh)), \ "1" ((USItype)(al)), \ "g" ((USItype)(bl))) #define umul_ppmm(w1, w0, u, v) \ __asm__ ("mull %3" \ - : "=a" ((USItype)(w0)), \ - "=d" ((USItype)(w1)) \ + : "=a" (w0), \ + "=d" (w1) \ : "%0" ((USItype)(u)), \ "rm" ((USItype)(v))) #define udiv_qrnnd(q, r, n1, n0, d) \ __asm__ ("divl %4" \ - : "=a" ((USItype)(q)), \ - "=d" ((USItype)(r)) \ + : "=a" (q), \ + "=d" (r) \ : "0" ((USItype)(n0)), \ "1" ((USItype)(n1)), \ "rm" ((USItype)(d)))