From patchwork Mon Jul 22 12:44:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 169383 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp7483415ilk; Mon, 22 Jul 2019 05:46:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqyZDtPOsu3KZa7UwJ5VrnrQAhS70FVHkHFp/nhaq3pdgYb0pWE45SnuamKvTknx4lHr3zFZ X-Received: by 2002:a63:608c:: with SMTP id u134mr71228858pgb.274.1563799604302; Mon, 22 Jul 2019 05:46:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563799604; cv=none; d=google.com; s=arc-20160816; b=p4D8wfIeAO0KWxsVdqAfngYTMLfkxQY60ywm+4OtbIum6lk1vpHAL/6hoCnGWsHQSb HmZbltRSl/A6BQho2kun0RwpHnTgSIvBtLaPTgTAKme/6ha+14H21xvpJu0j/BXlejdy IbDu5zhwD6BCTgmCoI1o9Vm+6hemfurPHob/KIq324lBkeZogcYm+9bjcjG9DnhqznGx RcWZozlUsvk92oVK+4ngddGsylx422KzY0nymAWSilXAsWaOkQE914qMGG7EEz+pLXOy YhoyZWhrivXAsOsWFeHQeH0HkkWk+OuwVfFrpaEiQsUho+bG/Tc6h2UXJ3e6/U2VpljC 5jgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zUpSPiawwv65Oz0jgp8PEGVXRN2FjX1K9acL/C/GoA8=; b=UufMYxvpMr0uB6tygPhZL5LSWK7uSAnsRVFGT7wYGoOezuQZd/S1rISqr322886ubD T8FVGBMxUBnn9QbTxT76S43slNBFyRKWqc9PTH36mqDOvXU0GkrxmkDti8epp5i1aB1L gL7hpSFeqL5vFXU652VaeN9ScZQa8jDenObYz0TCLwFiYVeUceAgrT6paFozVbhMoaCB h8k1FIPxxnpITEVpD/zuKD3ffJyVORu1a31fGuPyQD4YBnJT3P/ITJuePEk4nibZmbU5 UXTVi76XvreOUoZXmUnxOs1P6tgWJvjjEZBcT7QVZheS2P64TbU1WCL4RpwhM7tG7lG7 iCHg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m3si9231917pgq.414.2019.07.22.05.46.44; Mon, 22 Jul 2019 05:46:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728922AbfGVMqn (ORCPT + 3 others); Mon, 22 Jul 2019 08:46:43 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:45607 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726895AbfGVMqn (ORCPT ); Mon, 22 Jul 2019 08:46:43 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue011 [212.227.15.129]) with ESMTPA (Nemesis) id 1M4K2r-1hpGix19KD-000MNv; Mon, 22 Jul 2019 14:46:18 +0200 From: Arnd Bergmann To: Gustavo Pimentel , Vinod Koul Cc: Arnd Bergmann , Dan Williams , Andy Shevchenko , Russell King , Joao Pinto , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] [v2] dmaengine: dw-edma: fix endianess confusion Date: Mon, 22 Jul 2019 14:44:45 +0200 Message-Id: <20190722124457.1093886-3-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190722124457.1093886-1-arnd@arndb.de> References: <20190722124457.1093886-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:d5Lm4PYixfA8pbB02g2GgIjlRZdQahOKJAn4tWmkzSjHCHZz+0c mGByyd10vU6PjkFtT1c9Tv8zXEsWOBlurLMYYOe42GCRa3RycR4Fs37aYZDPSiXmWn+Uu+y jv1BzF7UXgTBBv8JeWwEGrn15D6CtjU7Sh1iDVnb2VD2B5ZqQQ8/PBuFNJDPaDvbiQjMSdB 9GCuhCcNGKxdwrlC6eD+Q== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:rySnjGhQpRQ=:wCX8tZwzY2BNeINq7MDHz8 eUWe8HmswCc/zzGV8LbVpGXmOdN8AiOSUYnJ/nbNtrDJTJkGPC4OvD2O8mKTvWEY62iC+diqy DEYWROsD7mOAClAHGC7Vx6X9G7FqiEkAqTu2uNvkVwCWm3mjAT6iYuM6S+vKn56XXr6ZXtQWx YQZDeE1OfsTwjbH1b2aY51w88Tw8BvRgI0jZPr4uYOD2SB3cagIwaV2sLhno2KPwvwtt85oLE yus0TuRnN3ANz+EzbHQdUDV1xH28sOcN4S+JoqcdKmFeI9pLowxMW0XfCQNTPD6Mcv0Hz4t9x bIzmnNMCm4Yg3ULjB9KGlW02Erv9aelWqImrQlmDY/Q/w4op1YjS7L0asNeGiWI/hnCo61/Jw q3W/EqMUXL6GDxFdZLYh3EsKXhqZufsS3DlmQYiEpiaVzVec59sfrcDR88OfqsCIyt+NGzWbg SYrzk95YQgr9gssxV9wL/ujvECJ4tT6M49KjHCv4dFcQ/FXPMMHBtLwhEN5nYXoptuZXsMSaE Qg1lQ+FaW9c1CRN88DrMqxK6NrhaJ3SnHGkbZHIr9gDCk94CsWkgndUPYNHjhq2Xop98taXB8 ljnxDhYUrpyPA5xt0dZ0zw74ou+Ifzsme2o/CbblGO/t6D0C1d8+x7YjZD0nGRBzZPb3ewyev Z9IoZ0JI5XrwozWgfpigS83KIk8fzHiAT21na6CxnVeYx/8FGKkKy39ONRJVi8ytXxsk8wAse lljaNp6U10E0LI2vRY0A+2uG+jqcqFhgaJJ6eQ== Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org When building with 'make C=1', sparse reports an endianess bug: drivers/dma/dw-edma/dw-edma-v0-debugfs.c:60:30: warning: cast removes address space of expression drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: warning: incorrect type in argument 1 (different address spaces) drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: expected void const volatile [noderef] *addr drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: got void *[assigned] ptr drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: warning: incorrect type in argument 1 (different address spaces) drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: expected void const volatile [noderef] *addr drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: got void *[assigned] ptr drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: warning: incorrect type in argument 1 (different address spaces) drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: expected void const volatile [noderef] *addr drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: got void *[assigned] ptr The current code is clearly wrong, as it passes an endian-swapped word into a register function where it gets swapped again. Just pass the variables directly into lower_32_bits()/upper_32_bits(). Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support") Link: https://lore.kernel.org/lkml/20190617131820.2470686-1-arnd@arndb.de/ Signed-off-by: Arnd Bergmann --- v2: remove unneeded local variables --- drivers/dma/dw-edma/dw-edma-v0-core.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) -- 2.20.0 Acked-by: Gustavo Pimentel diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c index 97e3fd41c8a8..692de47b1670 100644 --- a/drivers/dma/dw-edma/dw-edma-v0-core.c +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c @@ -195,7 +195,6 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) struct dw_edma_v0_lli __iomem *lli; struct dw_edma_v0_llp __iomem *llp; u32 control = 0, i = 0; - u64 sar, dar, addr; int j; lli = chunk->ll_region.vaddr; @@ -214,13 +213,11 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) /* Transfer size */ SET_LL(&lli[i].transfer_size, child->sz); /* SAR - low, high */ - sar = cpu_to_le64(child->sar); - SET_LL(&lli[i].sar_low, lower_32_bits(sar)); - SET_LL(&lli[i].sar_high, upper_32_bits(sar)); + SET_LL(&lli[i].sar_low, lower_32_bits(child->sar)); + SET_LL(&lli[i].sar_high, upper_32_bits(child->sar)); /* DAR - low, high */ - dar = cpu_to_le64(child->dar); - SET_LL(&lli[i].dar_low, lower_32_bits(dar)); - SET_LL(&lli[i].dar_high, upper_32_bits(dar)); + SET_LL(&lli[i].dar_low, lower_32_bits(child->dar)); + SET_LL(&lli[i].dar_high, upper_32_bits(child->dar)); i++; } @@ -232,9 +229,8 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) /* Channel control */ SET_LL(&llp->control, control); /* Linked list - low, high */ - addr = cpu_to_le64(chunk->ll_region.paddr); - SET_LL(&llp->llp_low, lower_32_bits(addr)); - SET_LL(&llp->llp_high, upper_32_bits(addr)); + SET_LL(&llp->llp_low, lower_32_bits(chunk->ll_region.paddr)); + SET_LL(&llp->llp_high, upper_32_bits(chunk->ll_region.paddr)); } void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) @@ -242,7 +238,6 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) struct dw_edma_chan *chan = chunk->chan; struct dw_edma *dw = chan->chip->dw; u32 tmp; - u64 llp; dw_edma_v0_core_write_chunk(chunk); @@ -262,9 +257,10 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) SET_CH(dw, chan->dir, chan->id, ch_control1, (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE)); /* Linked list - low, high */ - llp = cpu_to_le64(chunk->ll_region.paddr); - SET_CH(dw, chan->dir, chan->id, llp_low, lower_32_bits(llp)); - SET_CH(dw, chan->dir, chan->id, llp_high, upper_32_bits(llp)); + SET_CH(dw, chan->dir, chan->id, llp_low, + lower_32_bits(chunk->ll_region.paddr)); + SET_CH(dw, chan->dir, chan->id, llp_high, + upper_32_bits(chunk->ll_region.paddr)); } /* Doorbell */ SET_RW(dw, chan->dir, doorbell,