From patchwork Wed Jul 24 16:25:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 169632 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp10466938ilk; Wed, 24 Jul 2019 09:26:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqzT3M/FihqyH8OyYl/AuQCCvfn9u0hiZoh4yz5O3nN2pnlWR2oVhRVsK1YoZWAnIDKLCjPm X-Received: by 2002:a17:902:1003:: with SMTP id b3mr27016901pla.172.1563985594732; Wed, 24 Jul 2019 09:26:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563985594; cv=none; d=google.com; s=arc-20160816; b=lgvllhogPJ3YV8LO1NGtS8MbQNjDlv94XhuqLNSA7SX4tH4qJf/RvmjsCV3Ao37GfS cGBRB7r6aDAsViI6MHyhrMPbumL/WN1dIaepRFKzVvc3kImT2WjQXbeiG1E8xVj2g//0 WZjPZ9bHhDWlcjku56UG5jDnKF4mH8uGxe/Gweoh/8rpHZNTRN8Z/xjHOcApxSyVasBV k0WEvOisa3X49P9VrxNDSwCGRWKGpu9pCoTbB9potjkuI9Pn0Yy3lwxu8glaZ9musa6U qLAcPehID6dwAj5YPM9RKiA98wPXKaTxrmQb/ZbLsZdsEMWe1x7oCirisqHI88Vp9AfE I1pg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=2roKWGGOcYMrcSLUsywhGdIHpXief9ODir3Zcq8C4nY=; b=KwA0PUQc5P5+34RB+kebZVHivTgpnN0LSht6uqCpE2jcBaxGghol80y+51vZ7C0Id7 5kwgGlrijCWNOTl8+bM6HFvhvqikQSH4n8yC64T9jB+QpOJ7Oiginr6NbzQBvl3BF/yN GA0CMGTdDzrD8At/Mk7q2bryhczG7J8u9L8ewcIvjhNBo9tt3NiI3M51JD8TMxY14pg5 AkyrlwA37iCmg/LjYVu78Un3hpFUS80PFbj8Khn4JQsJL7Aq23mvmTlLV9i/Hqajh6jw 6xiQPFJUT/S6TsefmWPp2eeW1AB+Zinw5OfolhjnSCKlM1b/dIhIq358zsoEWbto3NIn kgTg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i2si16890351pfb.206.2019.07.24.09.26.34; Wed, 24 Jul 2019 09:26:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728951AbfGXQ0d (ORCPT + 29 others); Wed, 24 Jul 2019 12:26:33 -0400 Received: from foss.arm.com ([217.140.110.172]:43396 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728874AbfGXQ0A (ORCPT ); Wed, 24 Jul 2019 12:26:00 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A2BBB28; Wed, 24 Jul 2019 09:25:59 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4DC6E3F71F; Wed, 24 Jul 2019 09:25:58 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Cc: james.morse@arm.com, marc.zyngier@arm.com, julien.thierry@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Grall Subject: [PATCH v3 08/15] arm64/mm: Split asid_inits in 2 parts Date: Wed, 24 Jul 2019 17:25:27 +0100 Message-Id: <20190724162534.7390-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190724162534.7390-1-julien.grall@arm.com> References: <20190724162534.7390-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move out the common initialization of the ASID allocator in a separate function. Signed-off-by: Julien Grall --- Changes in v3: - Allow bisection (asid_allocator_init() return 0 on success not error!). --- arch/arm64/mm/context.c | 43 +++++++++++++++++++++++++++++++------------ 1 file changed, 31 insertions(+), 12 deletions(-) -- 2.11.0 diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index 3b40ac4a2541..27e328fffdb1 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -260,31 +260,50 @@ asmlinkage void post_ttbr_update_workaround(void) CONFIG_CAVIUM_ERRATUM_27456)); } -static int asids_init(void) +/* + * Initialize the ASID allocator + * + * @info: Pointer to the asid allocator structure + * @bits: Number of ASIDs available + * @asid_per_ctxt: Number of ASIDs to allocate per-context. ASIDs are + * allocated contiguously for a given context. This value should be a power of + * 2. + */ +static int asid_allocator_init(struct asid_info *info, + u32 bits, unsigned int asid_per_ctxt) { - struct asid_info *info = &asid_info; - - info->bits = get_cpu_asid_bits(); - info->ctxt_shift = ilog2(ASID_PER_CONTEXT); + info->bits = bits; + info->ctxt_shift = ilog2(asid_per_ctxt); /* * Expect allocation after rollover to fail if we don't have at least - * one more ASID than CPUs. ASID #0 is reserved for init_mm. + * one more ASID than CPUs. ASID #0 is always reserved. */ WARN_ON(NUM_CTXT_ASIDS(info) - 1 <= num_possible_cpus()); atomic64_set(&info->generation, ASID_FIRST_VERSION(info)); info->map = kcalloc(BITS_TO_LONGS(NUM_CTXT_ASIDS(info)), sizeof(*info->map), GFP_KERNEL); if (!info->map) - panic("Failed to allocate bitmap for %lu ASIDs\n", - NUM_CTXT_ASIDS(info)); - - info->active = &active_asids; - info->reserved = &reserved_asids; + return -ENOMEM; raw_spin_lock_init(&info->lock); + return 0; +} + +static int asids_init(void) +{ + u32 bits = get_cpu_asid_bits(); + + if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT)) + panic("Unable to initialize ASID allocator for %lu ASIDs\n", + 1UL << bits); + + asid_info.active = &active_asids; + asid_info.reserved = &reserved_asids; + pr_info("ASID allocator initialised with %lu entries\n", - NUM_CTXT_ASIDS(info)); + NUM_CTXT_ASIDS(&asid_info)); + return 0; } early_initcall(asids_init);