From patchwork Sun Oct 20 04:08:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 176985 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp1692865ill; Sat, 19 Oct 2019 21:08:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqx3PJCCRYK3f7TM85oCveqGQP19dMptk2CpbSnH0AprY6QN0umkqtVwo1y8ScrushJ3ejOa X-Received: by 2002:a05:6402:1804:: with SMTP id g4mr17977303edy.266.1571544514581; Sat, 19 Oct 2019 21:08:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571544514; cv=none; d=google.com; s=arc-20160816; b=HY3V1y9aGw0utK6rA0Z8kVrtjLsE0QOJ4GEaCkfKZHdvQWMmfzpJxHKV14k4fWUo4y erEQ41ZhcVtyMzbBfjythS/UvLLFeSamObq7jTV4F+JtK1S2f5+Gv2YVd93qGWBE9YuO aEFdrKInGd2Vkl8tCqVn6nVI4TNRGP2dNm54ruup3KWIMcnm12dASiIaktcRO7a1X5vr eh5yiwA4Fz57/r6YBCqCI7KowXVD0Aopm8hLQk59cEP4+/Yfs8KjOL4o/bev9lwprz0s jBJLedAUoupDQpzRHUMYJgU3ZqIRn9CXBzsRCa9gr6mw9ok6lOLqPs3z4zjNRfT6arTx uWug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=WrQFfgCRxb8JnvWAxbakadf3sCBfZZuEE+G1HikNWo8=; b=dvoFfa/mepKXnaQehe/vBUBgwh2mO9RgOgiKZE3JG8lN2woOovmw5lmYrosNvpu4nO rQwDXoLGldvFZJu/8BONO5TmnaQEhT/Qo2D9y74Y8AmA5/m9uLYca8sJSMzvuRTdviBy MBKBPB0N/KJaSdLVgYHBIlltaODZC9sZu/wMWC4ar1ZwnRnbszGQLgkbezzTQMYdZ/8L G4ajKvM5RjpAjgwrUHY68ejEVmuvxyxzNB3wvHmmF+jw+8TBnjndNX1tBS6JFcCFwAoc 1oXlSTSQe20Ond4d88iVxF6ncqf0bPJIH3kddFqOsNq/7rEVfckviP5MHHuBasDjd2dV vs5Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ok21si6221776ejb.95.2019.10.19.21.08.34; Sat, 19 Oct 2019 21:08:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726372AbfJTEIb (ORCPT + 26 others); Sun, 20 Oct 2019 00:08:31 -0400 Received: from mx2.suse.de ([195.135.220.15]:37180 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726294AbfJTEIa (ORCPT ); Sun, 20 Oct 2019 00:08:30 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 6B383B012; Sun, 20 Oct 2019 04:08:28 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, =?utf-8?q?Andreas_F=C3=A4rber?= , info@synology.com, Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/8] arm64: dts: realtek: Add RTD1293 and Synology DS418j Date: Sun, 20 Oct 2019 06:08:15 +0200 Message-Id: <20191020040817.16882-7-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191020040817.16882-1-afaerber@suse.de> References: <20191020040817.16882-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Device Trees for RTD1293 SoC and Synology DiskStation DS418j NAS. Cc: info@synology.com Signed-off-by: Andreas Färber --- v1 -> v2: * Moved SPDX-License-Identifier to top * Dropped "arm,armv8" (Rob) * Changed from MIT to BSD-2-Clause (Rob) * Dropped accidental enable-method and cpu-release-addr arch/arm64/boot/dts/realtek/Makefile | 3 ++ arch/arm64/boot/dts/realtek/rtd1293-ds418j.dts | 30 +++++++++++++++ arch/arm64/boot/dts/realtek/rtd1293.dtsi | 51 ++++++++++++++++++++++++++ 3 files changed, 84 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1293-ds418j.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1293.dtsi -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index 90c897ac3f7a..e7ff40461ddc 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only + +dtb-$(CONFIG_ARCH_REALTEK) += rtd1293-ds418j.dtb + dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-mele-v9.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-probox2-ava.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1293-ds418j.dts b/arch/arm64/boot/dts/realtek/rtd1293-ds418j.dts new file mode 100644 index 000000000000..b2dd583146b4 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1293-ds418j.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2017 Andreas Färber + */ + +/dts-v1/; + +#include "rtd1293.dtsi" + +/ { + compatible = "synology,ds418j", "realtek,rtd1293"; + model = "Synology DiskStation DS418j"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1293.dtsi b/arch/arm64/boot/dts/realtek/rtd1293.dtsi new file mode 100644 index 000000000000..bd4e22723f7b --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1293.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1293 SoC + * + * Copyright (c) 2017-2019 Andreas Färber + */ + +#include "rtd129x.dtsi" + +/ { + compatible = "realtek,rtd1293"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; + +&arm_pmu { + interrupt-affinity = <&cpu0>, <&cpu1>; +};