From patchwork Mon Oct 21 13:37:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaldo Carvalho de Melo X-Patchwork-Id: 177084 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3435482ill; Mon, 21 Oct 2019 06:40:02 -0700 (PDT) X-Google-Smtp-Source: APXvYqxevEJnCP1VkkS0JQ6eQRJw7SIl81TZABtmODBY+cYhK+nO0/lTNu1dK9vIEvlK/KJyIxXO X-Received: by 2002:a17:906:54c7:: with SMTP id c7mr21276964ejp.226.1571665202480; Mon, 21 Oct 2019 06:40:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571665202; cv=none; d=google.com; s=arc-20160816; b=ihiEZEzlsM3TVFB/ka6Ox1fHSvw7FPBOaTWhrmqbU3eKOj+9wGMWsVMze3RSVYNrRn 0PIaG4QPopzOOw0ueS3skb20U8U0iJyoTPigh5GZQnWZeTcT5Oz0XllGEAm66bKaYkNL GZhddDrquVJeU/nLt2rQfyI+itXJ/GL+3DoGnsbWGpVVNaV4hfqCkDyWwuo9XXG2f37Y 4010RzcmspyG+Zivx2hzwdpKLc71oboob/UpZ5iWxeKXTRs9mWscpOaVjZVhU+Ko6/Ab z2rYAuztYd4m51BTnZO/6nmasJ0kUzeARvkJAdWsVl+6s5bikgtNJPe1GhF20SKaZPGD PC9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=b3HyM+Bf5ZG18+ZkAeexZp2w+2yqrgbikaduqXQmkEA=; b=W25jkUfXtR+PBzjhsz+pK0sYuiYvIsbVfyWKKwnK2icU+K/T8DVsbXr7VFP4ud+OmQ xIcfDSENS6G/CNFp50rh1Mkm1gxs69vTXLK9JOs9yp/pzX/UUcFR80+i1vevvTDhsGEw G5shupPcRRguvNTLL4XWR7vA2zy2Tmg15aDPobTk+obcxtDCvoajLQi90sdaEXxcd0Ao 3hBY5PUcGqAbVXZblih0ch8kiO2yVUL8/tpJ+mg8JEhOoCNvXfS+wy6VJWoG0bswrfQD sgatd0BVuKs1PCo+2uyqeV2Ranox/NCR2gliVjUWduhtQOvw7cNQWG59RsMG+/6vgstl 7FZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=tVTbRLxw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x22si1596672ejv.335.2019.10.21.06.40.02; Mon, 21 Oct 2019 06:40:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=tVTbRLxw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729371AbfJUNkA (ORCPT + 26 others); Mon, 21 Oct 2019 09:40:00 -0400 Received: from mail.kernel.org ([198.145.29.99]:41470 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727152AbfJUNjw (ORCPT ); Mon, 21 Oct 2019 09:39:52 -0400 Received: from quaco.ghostprotocols.net (unknown [179.97.35.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id ACB452166E; Mon, 21 Oct 2019 13:39:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1571665191; bh=QaO8bSHrlGSQLLLS56coI3qNcVX5iG2JZY1zbN6UFqs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tVTbRLxwqPS9SWbPvrIOmdnGu/X4dTxk0PL6YOYcmMuQ4wtQl/B6Eq+kTWQacyMqj C/32aOOJJQ+5WNOC+hokWtaUK75wRIjhZ9WyXr/fF3Rpn70Fj3QzEsIrj1ijiWD2w7 DER4E1UTjh9lZMTz/JoGscPLcLbeEFoQUJ5SQ9TU= From: Arnaldo Carvalho de Melo To: Ingo Molnar , Thomas Gleixner Cc: Jiri Olsa , Namhyung Kim , Clark Williams , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, John Garry , Shaokun Zhang , Alexander Shishkin , Jiri Olsa , Mark Rutland , Peter Zijlstra , Will Deacon , linuxarm@huawei.com, Arnaldo Carvalho de Melo Subject: [PATCH 21/57] perf vendor events arm64: Add some missing events for Hisi hip08 L3C PMU Date: Mon, 21 Oct 2019 10:37:58 -0300 Message-Id: <20191021133834.25998-22-acme@kernel.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191021133834.25998-1-acme@kernel.org> References: <20191021133834.25998-1-acme@kernel.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: John Garry Add some more missing events. Signed-off-by: John Garry Reviewed-by: Shaokun Zhang Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Mark Rutland Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Will Deacon Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1567612484-195727-4-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo --- .../arm64/hisilicon/hip08/uncore-l3c.json | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) -- 2.21.0 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json index ca48747642e1..f463d0acfaef 100644 --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json @@ -34,4 +34,60 @@ "PublicDescription": "l3c precharge commands", "Unit": "hisi_sccl,l3c", }, + { + "EventCode": "0x20", + "EventName": "uncore_hisi_l3c.rd_spipe", + "BriefDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", + "PublicDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x21", + "EventName": "uncore_hisi_l3c.wr_spipe", + "BriefDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe", + "PublicDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x22", + "EventName": "uncore_hisi_l3c.rd_hit_spipe", + "BriefDescription": "Count of the number of read lines that hits in spipe of this L3C", + "PublicDescription": "Count of the number of read lines that hits in spipe of this L3C", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x23", + "EventName": "uncore_hisi_l3c.wr_hit_spipe", + "BriefDescription": "Count of the number of write lines that hits in spipe of this L3C", + "PublicDescription": "Count of the number of write lines that hits in spipe of this L3C", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x29", + "EventName": "uncore_hisi_l3c.back_invalid", + "BriefDescription": "Count of the number of L3C back invalid operations", + "PublicDescription": "Count of the number of L3C back invalid operations", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x40", + "EventName": "uncore_hisi_l3c.retry_cpu", + "BriefDescription": "Count of the number of retry that L3C suppresses the CPU operations", + "PublicDescription": "Count of the number of retry that L3C suppresses the CPU operations", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x41", + "EventName": "uncore_hisi_l3c.retry_ring", + "BriefDescription": "Count of the number of retry that L3C suppresses the ring operations", + "PublicDescription": "Count of the number of retry that L3C suppresses the ring operations", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x42", + "EventName": "uncore_hisi_l3c.prefetch_drop", + "BriefDescription": "Count of the number of prefetch drops from this L3C", + "PublicDescription": "Count of the number of prefetch drops from this L3C", + "Unit": "hisi_sccl,l3c", + }, ]