From patchwork Mon Nov 4 01:39:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 178379 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp851424ilf; Sun, 3 Nov 2019 17:40:34 -0800 (PST) X-Google-Smtp-Source: APXvYqwbao5nagDPRLurYD10XWe3XozgHzrokFuHOl72Luiwh3njI7VFxvH9Zsczi5kPOzF21UvK X-Received: by 2002:a17:906:b289:: with SMTP id q9mr13566891ejz.183.1572831633702; Sun, 03 Nov 2019 17:40:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1572831633; cv=none; d=google.com; s=arc-20160816; b=v846JH+/1vdX5usadWnSm6w++SSa+pA/p5U078TJr8aXYamzxrQHhB1tZk6cVB3+cj G8PjPJ6uZQnA7H2fWxc2ksj1XJJ+49tuj/+fXMle6li2vVJCU1rakmOSwMFfCa2TM8gS b1QJAgTwSRcJ5L+bn6K2w4oXW01to8Hv5injw11LGIWVgq/n1eSYAhNVYaKCPCEn3uJF GPVXq7grmueT96dmVLF4a9wh8rG5EitbRsz2dDEoK4XH+onCO4EWbtTc1DyEtLdWKHJ+ eg0NXJDkbPUn9+PDCJitTeaNcDVmEhOGNt8dyyDHy6HR2QwiOUEgzt6sgAJMJ/Q+AV3x CODQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=g2FDq2tN6FNA/K9W/v2aEq55MFXKZaRosFC7TC6Opbo=; b=K3mRGrHb1yy2wbTMtDsygOsy5vic3GRKowLrJQJn3sqCL4UbW0i825ZOBIRPgKufex YLtpZolQiKyGjTJCZuV/8i4E13n2g02jWeL22/gn0tuEjYvF9XpadyjLVZ4oJXUipIiL 6o9i9N/dhoiuBxXr7Wo0Q5I0cBw2hNbftD3EVkyWYNfAHPsPrJRumgBg8v2boJviAucH DKNOlo828QGcdO2tZ88YicF4E3EEoY4NsZGgiZ/ufwSi3zvI+fvcsFMvMocNUl20nxp7 k+rxQEyLCUGoQ34kcS9KDfLoc0QBm1mgsbsa0o/k5oYwOQH7J/QaVlfsZqk7LRWHnueJ +f3w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id pw16si1127765ejb.119.2019.11.03.17.40.33; Sun, 03 Nov 2019 17:40:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728818AbfKDBk3 (ORCPT + 26 others); Sun, 3 Nov 2019 20:40:29 -0500 Received: from mx2.suse.de ([195.135.220.15]:55726 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728352AbfKDBk2 (ORCPT ); Sun, 3 Nov 2019 20:40:28 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 81A9CB1AC; Mon, 4 Nov 2019 01:40:26 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 3/7] arm64: dts: realtek: rtd1295: Add Mali node Date: Mon, 4 Nov 2019 02:39:28 +0100 Message-Id: <20191104013932.22505-4-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191104013932.22505-1-afaerber@suse.de> References: <20191104013932.22505-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 85 ++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 93f0e1d97721..61aa4f47c70b 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -69,6 +69,91 @@ ; }; + + mali_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp@620000000 { + opp-hz = /bits/ 64 <620000000>; + opp-microvolt = <1100000>; + }; + + opp@600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1100000>; + }; + + opp@580000000 { + opp-hz = /bits/ 64 <580000000>; + opp-microvolt = <1075000>; + }; + + opp@560000000 { + opp-hz = /bits/ 64 <560000000>; + opp-microvolt = <1075000>; + }; + + opp@540000000 { + opp-hz = /bits/ 64 <540000000>; + opp-microvolt = <1050000>; + }; + + opp@520000000 { + opp-hz = /bits/ 64 <520000000>; + opp-microvolt = <1025000>; + }; + + opp@500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1000000>; + }; + + opp@460000000 { + opp-hz = /bits/ 64 <460000000>; + opp-microvolt = <1000000>; + }; + + opp@440000000 { + opp-hz = /bits/ 64 <440000000>; + opp-microvolt = <1000000>; + }; + + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1000000>; + }; + + opp@380000000 { + opp-hz = /bits/ 64 <380000000>; + opp-microvolt = <975000>; + }; + + opp@340000000 { + opp-hz = /bits/ 64 <340000000>; + opp-microvolt = <975000>; + }; + + opp@300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <900000>; + }; + }; + + soc { + mali: gpu@98050000 { + compatible = "realtek,rtd1295-mali", "arm,mali-t820"; + reg = <0x98050000 0x10000>; + clocks = <&clkc RTD1295_CLK_EN_GPU>; + clock-names = "core"; + resets = <&reset1 RTD1295_RSTN_GPU>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + operating-points-v2 = <&mali_opp_table>; + #cooling-cells = <2>; + }; + }; }; &arm_pmu {