From patchwork Sun Nov 17 07:21:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179566 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1380432ilf; Sat, 16 Nov 2019 23:21:35 -0800 (PST) X-Google-Smtp-Source: APXvYqy8rjQ1GBYjDe7ON+juyUNkjjIPFQZEnlrFHkGJZAxrfHGbeiHJoITkZpufC5atIfUg2biE X-Received: by 2002:a17:906:1342:: with SMTP id x2mr16158121ejb.304.1573975295484; Sat, 16 Nov 2019 23:21:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573975295; cv=none; d=google.com; s=arc-20160816; b=I2l2ao6JFNXkBMF/Fj6mdSUJIJKYxj/KxjhxTSjw+6lB5L58srZ5/ITrsgHDdDratd LFVFK3zxnGq2Nbj6vV1XDjctiO2a0kTXy3c3MpeIArZ2vTwhhptxbMS6F9nr1h/bS/xg r5l8qQUZBFbzplEi2pP1Lx11+HCVF6usV+Kyb8wsZEctadQnUk6P+kWSPeYZO5hvuAvj 8vsYRHjQTtiQt+XoIyARAA7tQ5QelIlxUTdMtbnGahLPv6502a0i1UJmbFmwmfENBCqg /EBVkamXv5I31B9vL42ti0tgpnOZKgGIQNT7wNlPLwaqFnG2SLP+DlQEg3++BBwkMDSx kxRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=HjqRwP8ArD57XZgZHFi7uv9wq/Vh7HoVCAtLDhEKBao=; b=e2I4raIZSqioI9Gp/iM7VDp/Ar4Tmd+SPJNJM+uOrDq16ju69U42m34OenTufO3vOn UgdkKsllf8IjkjQYKDIbNdEUfQnt40sOaWCCjzJ2nfYAzN3WZPm93sFmv8knNJNMmRdN C0xF65OopPpzWDJGb8LywyomU9BnRJPvMoQysTHto6JklVx45i47MC0S63+C9rdJKgQr 5Y5NhhbIlqcHmcqgtwmEr6LQTx/Da52pwzBNNDoI6tXyWGS0mlNPSFwknNvuQBjGmAW+ qvStRk1JM8OpRg1ZjxMiiePFUgodnnp3dzriw0Ox6SILtwoqdw6LLmSUHp5T3rTpWoyL mlfg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q20si9182013eja.339.2019.11.16.23.21.35; Sat, 16 Nov 2019 23:21:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726234AbfKQHV0 (ORCPT + 26 others); Sun, 17 Nov 2019 02:21:26 -0500 Received: from mx2.suse.de ([195.135.220.15]:40824 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726134AbfKQHVY (ORCPT ); Sun, 17 Nov 2019 02:21:24 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 9E238B317; Sun, 17 Nov 2019 07:21:22 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Russell King Subject: [PATCH v3 8/8] ARM: realtek: Enable RTD1195 arch timer Date: Sun, 17 Nov 2019 08:21:09 +0100 Message-Id: <20191117072109.20402-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191117072109.20402-1-afaerber@suse.de> References: <20191117072109.20402-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Without this magic write the timer doesn't work and boot gets stuck. Signed-off-by: Andreas Färber --- What is the name of the register 0xff018000? Is 0x1 a BIT(0) write, or how are the register bits defined? Is this a reset or a clock gate? How should we model it in DT? v2 -> v3: Unchanged v2: New arch/arm/mach-realtek/rtd1195.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.16.4 diff --git a/arch/arm/mach-realtek/rtd1195.c b/arch/arm/mach-realtek/rtd1195.c index b31a4066be87..0532379c74f5 100644 --- a/arch/arm/mach-realtek/rtd1195.c +++ b/arch/arm/mach-realtek/rtd1195.c @@ -5,6 +5,9 @@ * Copyright (c) 2017-2019 Andreas Färber */ +#include +#include +#include #include #include @@ -24,6 +27,18 @@ static void __init rtd1195_reserve(void) rtd1195_memblock_remove(0x18100000, 0x01000000); } +static void __init rtd1195_init_time(void) +{ + void __iomem *base; + + base = ioremap(0xff018000, 4); + writel(0x1, base); + iounmap(base); + + of_clk_init(NULL); + timer_probe(); +} + static const char *const rtd1195_dt_compat[] __initconst = { "realtek,rtd1195", NULL @@ -31,6 +46,7 @@ static const char *const rtd1195_dt_compat[] __initconst = { DT_MACHINE_START(rtd1195, "Realtek RTD1195") .dt_compat = rtd1195_dt_compat, + .init_time = rtd1195_init_time, .reserve = rtd1195_reserve, .l2c_aux_val = 0x0, .l2c_aux_mask = ~0x0,