From patchwork Tue Sep 8 16:50:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 53275 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by patches.linaro.org (Postfix) with ESMTPS id E74A722B05 for ; Tue, 8 Sep 2015 16:50:54 +0000 (UTC) Received: by wicgb1 with SMTP id gb1sf38795395wic.3 for ; Tue, 08 Sep 2015 09:50:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:subject:to:references:cc:from :message-id:date:user-agent:mime-version:in-reply-to:content-type :content-transfer-encoding:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=dcaLS1RvvB1hJL2atzYLywEEU1h2RPIwkgpa5eIG3S4=; b=LgYTbIRl7+yrIoiOiIXn9Z695kIMoKDK/XCV0onggHS9vfVaDy0KYTzayIvf1ltJ7x OWwPKnEnLryEdwTwi2QjPGXwQ47c7aQECGJ+iYZV13wCEIABblhmkt6gCSgqPM+kbeLL X6JkTqyjRzYKY0hP7uKhUiizqr3qvMPqVmkFb6pjpMQzrvJ/L8+Dn557+CMkBZCkrrSr /OK0yB0Szm922Khc/A7M0Ub5nIUtnw+yokdtsfHL8DXmuObQ1Yn004JsKcyUdmeY15kD Z/2bE16qM6Uu14J2hqqqwIn39/H7nYvGfuXFsNiD6psiVWjCWGOtp6ofjRaSJhIlKDbR pa3A== X-Gm-Message-State: ALoCoQmFJvBzNAMxMx3JwGU4tuW25tpW+1JgS2byq2eEfego78by5/dEc7dzkdR45QCzmHLCwFDM X-Received: by 10.180.79.66 with SMTP id h2mr6969136wix.3.1441731054243; Tue, 08 Sep 2015 09:50:54 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.44.130 with SMTP id e2ls260783lam.40.gmail; Tue, 08 Sep 2015 09:50:54 -0700 (PDT) X-Received: by 10.152.26.135 with SMTP id l7mr7666378lag.59.1441731054076; Tue, 08 Sep 2015 09:50:54 -0700 (PDT) Received: from mail-la0-f53.google.com (mail-la0-f53.google.com. [209.85.215.53]) by mx.google.com with ESMTPS id xh2si3749860lbb.130.2015.09.08.09.50.53 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Sep 2015 09:50:53 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) client-ip=209.85.215.53; Received: by lamp12 with SMTP id p12so71431704lam.0 for ; Tue, 08 Sep 2015 09:50:53 -0700 (PDT) X-Received: by 10.112.166.106 with SMTP id zf10mr23706651lbb.36.1441731053860; Tue, 08 Sep 2015 09:50:53 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1093759lbq; Tue, 8 Sep 2015 09:50:52 -0700 (PDT) X-Received: by 10.68.244.234 with SMTP id xj10mr60711340pbc.13.1441731052556; Tue, 08 Sep 2015 09:50:52 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ff4si6438984pab.164.2015.09.08.09.50.51; Tue, 08 Sep 2015 09:50:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754726AbbIHQuv (ORCPT + 2 others); Tue, 8 Sep 2015 12:50:51 -0400 Received: from foss.arm.com ([217.140.101.70]:55493 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754521AbbIHQuu (ORCPT ); Tue, 8 Sep 2015 12:50:50 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1E60375; Tue, 8 Sep 2015 09:50:59 -0700 (PDT) Received: from [10.1.207.150] (e103737-lin.cambridge.arm.com [10.1.207.150]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 061D93F318; Tue, 8 Sep 2015 09:50:47 -0700 (PDT) Subject: Re: [PATCH v4] pinctrl: mediatek: Implement wake handler and suspend resume To: maoguang meng References: <1439541486-22203-1-git-send-email-maoguang.meng@mediatek.com> <55DB4609.5040904@arm.com> <1441535972.22230.5.camel@mhfsdcap03> <55EEAA24.6080706@arm.com> Cc: Daniel Kurtz , Sudeep Holla , Linus Walleij , Hongzhou Yang , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-mediatek@lists.infradead.org" , Matthias Brugger , Yingjoe Chen , "linux-arm-kernel@lists.infradead.org" From: Sudeep Holla Message-ID: <55EF11E6.7030307@arm.com> Date: Tue, 8 Sep 2015 17:50:46 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <55EEAA24.6080706@arm.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: sudeep.holla@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On 08/09/15 10:28, Sudeep Holla wrote: > > > On 06/09/15 11:39, maoguang meng wrote: >> On Wed, 2015-09-02 at 14:02 +0800, Daniel Kurtz wrote: >>> Hi maoguang, >>> >>> On Tue, Aug 25, 2015 at 12:27 AM, Sudeep Holla wrote: >>>> >>>> >>>> On 14/08/15 09:38, maoguang.meng@mediatek.com wrote: >>>>> >>>>> From: Maoguang Meng >>>>> >>>>> This patch implement irq_set_wake to get who is wakeup source and >>>>> setup on suspend resume. >>>>> >>>>> Signed-off-by: Maoguang Meng >>>>> >>> [snip] >>> >>> Can you please respond to Sudeep's questions: >>> >>>> Does this pinmux controller: >>>> >>>> 1. Support wake-up configuration ? If not, you need to use >>>> IRQCHIP_SKIP_SET_WAKE. I don't see any value in writing the >>>> mask_{set,clear} if the same registers are used for {en,dis}able >> >> YES. >> we can call enable_irq_wake(irq) to config this irq as a wake-up >> source. >> > > No that doesn't answer my question. Yes you can always call > enable_irq_wake(irq) as along as you have irq_set_wake implemented. > But my question was does this pinmux controller support wake-up > configuration. > > IMHO, by looking at the implementation I can confirm *NO*, it doesn't. > So please stop copy-pasting the implementation from other drivers. > The reason is you operate on the same mask_{set,clear} which you use > to {en,dis}able the interrupts which means you don't have to do anything > to configure an interrupt as a wakeup source other than just keeping > them enabled. Hopefully this clarifies. > >>>> >>>> 2. Is in always on domain ? If not, you need save/restore only to >>>> resume back the functionality. Generally we can set >>>> IRQCHIP_MASK_ON_SUSPEND to ensure non-wake-up interrupts are >>>> disabled during suspend and re-enabled in resume path. You just >>>> save/restore raw values without tracking the wake-up source. >> >> YES. >> > > Again *YES* for what part of my question. If it's always-on, then you > don't need this suspend/resume callbacks at all, so I assume the answer > is *NO*. > IIUC this pinmux controller, something like below should work. ---->8 From 7c26992bce047efb66a6ba8d2ffec2b272499df7 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Tue, 8 Sep 2015 17:35:38 +0100 Subject: [PATCH] pinctrl: mediatek: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND The mediatek pinmux controller doesn't provides any facility to configure the wakeup sources. So instead of providing redundant irq_set_wake functionality, SKIP_SET_WAKE could be set to it. Also there's no need to maintain 2 sets of masks. This patch enables IRQCHIP_SKIP_SET_WAKE and IRQCHIP_MASK_ON_SUSPEND and also removes wake_mask. Cc: Linus Walleij Cc: Matthias Brugger Cc: Hongzhou Yang Cc: Yingjoe Chen Cc: Maoguang Meng Cc: Chaotian Jing Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Sudeep Holla --- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 24 +----------------------- drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 1 - 2 files changed, 1 insertion(+), 24 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 7726c6caaf83..d8e194a5bb31 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1063,20 +1063,6 @@ static int mtk_eint_set_type(struct irq_data *d, return 0; } -static int mtk_eint_irq_set_wake(struct irq_data *d, unsigned int on) -{ - struct mtk_pinctrl *pctl = irq_data_get_irq_chip_data(d); - int shift = d->hwirq & 0x1f; - int reg = d->hwirq >> 5; - - if (on) - pctl->wake_mask[reg] |= BIT(shift); - else - pctl->wake_mask[reg] &= ~BIT(shift); - - return 0; -} - static void mtk_eint_chip_write_mask(const struct mtk_eint_offsets *chip, void __iomem *eint_reg_base, u32 *buf) { @@ -1112,7 +1098,6 @@ static int mtk_eint_suspend(struct device *device) reg = pctl->eint_reg_base; mtk_eint_chip_read_mask(eint_offsets, reg, pctl->cur_mask); - mtk_eint_chip_write_mask(eint_offsets, reg, pctl->wake_mask); return 0; } @@ -1153,9 +1138,9 @@ static struct irq_chip mtk_pinctrl_irq_chip = { .irq_unmask = mtk_eint_unmask, .irq_ack = mtk_eint_ack, .irq_set_type = mtk_eint_set_type, - .irq_set_wake = mtk_eint_irq_set_wake, .irq_request_resources = mtk_pinctrl_irq_request_resources, .irq_release_resources = mtk_pinctrl_irq_release_resources, + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, }; static unsigned int mtk_eint_init(struct mtk_pinctrl *pctl) @@ -1393,13 +1378,6 @@ int mtk_pctrl_init(struct platform_device *pdev, } ports_buf = pctl->devdata->eint_offsets.ports; - pctl->wake_mask = devm_kcalloc(&pdev->dev, ports_buf, - sizeof(*pctl->wake_mask), GFP_KERNEL); - if (!pctl->wake_mask) { - ret = -ENOMEM; - goto chip_error; - } - pctl->cur_mask = devm_kcalloc(&pdev->dev, ports_buf, sizeof(*pctl->cur_mask), GFP_KERNEL); if (!pctl->cur_mask) { diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h index 55a534338931..acd804a945d8 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h @@ -267,7 +267,6 @@ struct mtk_pinctrl { void __iomem *eint_reg_base; struct irq_domain *domain; int *eint_dual_edges; - u32 *wake_mask; u32 *cur_mask; };