From patchwork Thu Sep 13 16:42:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 146633 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp812523ljw; Thu, 13 Sep 2018 09:42:45 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdb2uGTA+Iao17jyeeZHkN4yPB1Tq3hccmQ+ScOG1hxv7f942FZgXpsEhaoqdMRaBIFaIH85 X-Received: by 2002:a63:4860:: with SMTP id x32-v6mr7886217pgk.375.1536856965737; Thu, 13 Sep 2018 09:42:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536856965; cv=none; d=google.com; s=arc-20160816; b=nXvJ4M37WG/4CqD7ViFxAjQwsP20nCK9Gb25GeDETcoV0RX5rzaAEa8/YwM9x2NY0d j6ncY3AeVjC82e4fVNFhKIVwyCw9QSri3WLxdkOheeDIp6IOwx9v4vIQbHG/j6nssrSr yA2almvTwDuZEHyA8PBgiJC8xycLgGT1YN1EEcgjuulvZQ8yx53nw3xzsSkr2b4IWoBP z1XxUS289p6kfao8BxER2d++0Eg33UMS5KSMOKjZIiKdnJsaiQhGgoON9Jj3EOClBMiB Qm7wTSEabL4omlN+VH678ZxnPVNtsjdAaH7wH7AEIrrYjZGKXPPXXftzSYbO3O69uUhm SedQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=dLiTFHPE9aU4Hn6YgQH8nqBIpwAxz2ElmjiuA4HNLw4=; b=LYqMM+6hMZg09TTWCqRGm1g7auy8WhxuScBROzmk1AZUKdNSoTTvdC1MhahzQeDmV9 M+5LXne6OO+6acdrnPPUFsHdjy3EpWLGclT9ACOxnDgvnmlT19GRA966G25ROcwokvA6 vEe1ALq0IKSPfK4Iin+Y5phAZds+nzSa+0FYGbbTTUxE5CFZ+SE307CE04jn7V1pm1Sz EG7E3IhbZsn3+4Z2+743aEjNO9PAXtgVQBiPEf7X/W88gULk38ELXWmZLhxh5ivIqaOV kqY6sh4b5mjRLPPeFTP0PxlD5CUvUkI9MXzkWwiPGco7dMoqlxVQ6TSOcSc5UL3pY/jw PisQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 14-v6si4726138plb.230.2018.09.13.09.42.45; Thu, 13 Sep 2018 09:42:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728287AbeIMVxA (ORCPT + 32 others); Thu, 13 Sep 2018 17:53:00 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:51124 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726452AbeIMVw7 (ORCPT ); Thu, 13 Sep 2018 17:52:59 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7AA4C1682; Thu, 13 Sep 2018 09:42:42 -0700 (PDT) Received: from e110467-lin.cambridge.arm.com (e110467-lin.emea.arm.com [10.4.12.131]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B03C83F703; Thu, 13 Sep 2018 09:42:40 -0700 (PDT) From: Robin Murphy To: joro@8bytes.org, will.deacon@arm.com, thunder.leizhen@huawei.com, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: linuxarm@huawei.com, guohanjun@huawei.com, huawei.libin@huawei.com, john.garry@huawei.com Subject: [PATCH v6 3/7] iommu/io-pgtable-arm: Add support for non-strict mode Date: Thu, 13 Sep 2018 17:42:20 +0100 Message-Id: <842302266d7a079e78ac6db3739be8dbf8a5cdab.1536856828.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.19.0.dirty In-Reply-To: References: MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhen Lei To support non-strict mode, now we only TLBI and sync for strict mode, except for non-leaf invalidations since page table updates themselves must always be synchronous. To save having to reason about it too much, make sure the invalidation in arm_lpae_split_blk_unmap() just performs its own unconditional sync to minimise the window in which we're technically violating the break- before-make requirement on a live mapping. This might work out redundant with an outer-level sync for strict unmaps, but we'll never be splitting blocks on a DMA fastpath anyway. Signed-off-by: Zhen Lei [rm: tweak comment, commit message, and split_blk_unmap logic] Signed-off-by: Robin Murphy --- drivers/iommu/io-pgtable-arm.c | 9 ++++++--- drivers/iommu/io-pgtable.h | 5 +++++ 2 files changed, 11 insertions(+), 3 deletions(-) -- 2.19.0.dirty diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 2f79efd16a05..5b915aab7fd3 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -576,6 +576,7 @@ static size_t arm_lpae_split_blk_unmap(struct arm_lpae_io_pgtable *data, tablep = iopte_deref(pte, data); } else if (unmap_idx >= 0) { io_pgtable_tlb_add_flush(&data->iop, iova, size, size, true); + io_pgtable_tlb_sync(&data->iop); return size; } @@ -609,7 +610,7 @@ static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, io_pgtable_tlb_sync(iop); ptep = iopte_deref(pte, data); __arm_lpae_free_pgtable(data, lvl + 1, ptep); - } else { + } else if (!(iop->cfg.quirks & IO_PGTABLE_QUIRK_NON_STRICT)) { io_pgtable_tlb_add_flush(iop, iova, size, size, true); } @@ -771,7 +772,8 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) u64 reg; struct arm_lpae_io_pgtable *data; - if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | IO_PGTABLE_QUIRK_NO_DMA)) + if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | IO_PGTABLE_QUIRK_NO_DMA | + IO_PGTABLE_QUIRK_NON_STRICT)) return NULL; data = arm_lpae_alloc_pgtable(cfg); @@ -863,7 +865,8 @@ arm_64_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie) struct arm_lpae_io_pgtable *data; /* The NS quirk doesn't apply at stage 2 */ - if (cfg->quirks & ~IO_PGTABLE_QUIRK_NO_DMA) + if (cfg->quirks & ~(IO_PGTABLE_QUIRK_NO_DMA | + IO_PGTABLE_QUIRK_NON_STRICT)) return NULL; data = arm_lpae_alloc_pgtable(cfg); diff --git a/drivers/iommu/io-pgtable.h b/drivers/iommu/io-pgtable.h index 2df79093cad9..47d5ae559329 100644 --- a/drivers/iommu/io-pgtable.h +++ b/drivers/iommu/io-pgtable.h @@ -71,12 +71,17 @@ struct io_pgtable_cfg { * be accessed by a fully cache-coherent IOMMU or CPU (e.g. for a * software-emulated IOMMU), such that pagetable updates need not * be treated as explicit DMA data. + * + * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs + * on unmap, for DMA domains using the flush queue mechanism for + * delayed invalidation. */ #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) #define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2) #define IO_PGTABLE_QUIRK_ARM_MTK_4GB BIT(3) #define IO_PGTABLE_QUIRK_NO_DMA BIT(4) + #define IO_PGTABLE_QUIRK_NON_STRICT BIT(5) unsigned long quirks; unsigned long pgsize_bitmap; unsigned int ias;