From patchwork Fri Dec 1 13:44:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 120325 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp1156963qgn; Fri, 1 Dec 2017 05:45:58 -0800 (PST) X-Google-Smtp-Source: AGs4zMY2jtvHtvcD7piyGYsY0UH0P1qrY4/PZJIP3jUTz2GS1e6XfGNdIyZ6t2/cTR50P7scx7O4 X-Received: by 10.99.108.67 with SMTP id h64mr5997653pgc.119.1512135958186; Fri, 01 Dec 2017 05:45:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512135958; cv=none; d=google.com; s=arc-20160816; b=xSZc0w/zW76UdOnh1mDDlTP8lfZHOzjYOgV8NCvBU53o1xhlprq2pf+GSXnKurLvSz BNT2tXB1mn0k0Zc53eO9htfp1fPqwikwSpXQLtYm8k7EqsP/Z0qmGuU7c8J1f2KokDKi kPrGtfAnYyXiKJafGb2q1FSWVtR9KgorisFvKIVxpkHHpdw+LscCGsuWcO48KmeROYya /Z4gTIMgB8t0Yk8EsNJT89p1vv2joqs3nXG27Gf6dlxavsPHbLQqn4r9aaTH6FyHCpZj +mt70zZYJZCYazDyZW5YzOKEfN1BwtOKE5vg5inrlq0mWIoP48A+FoRE1b6Fjporz5Ot VymQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=pXirMTqG7MoLtI6rt4seQ9oGkoELcfpEEp8eY+7ikxU=; b=XYIF9SIErDjg8B9Rd6ffqguUsSWppE6mdDOfiPWo5/pFaqDBOZPqT69sD9ZrkCO56s Anmmdjk0GHfk7G6WvB4sXPRyHNbesY12uJr3SxN6+TkfD5cG9ZPoEMGr7evzHybuAnjM /JrbxXwKSzkgdY6ImKSpNA+8nXyRCtyrYx6y383dRmWjEWzsbxkXCvDBX5UzcuHWCEM1 nVClSVr8Sgrt9KRFJH1lsGv/axOHQMyh90ys2d7aC2RXBwphzJmHMLd7LxrXCJlvWyZE lBzPRdXa5jvVx0iIfat/AyTKq0PCIbutelqgXfdKOIEKZhvTfI4YIhbg0mZ6Qufyik5C RNFw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m17si4811498pgn.776.2017.12.01.05.45.57; Fri, 01 Dec 2017 05:45:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753112AbdLANp4 (ORCPT + 28 others); Fri, 1 Dec 2017 08:45:56 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:36265 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752919AbdLANpw (ORCPT ); Fri, 1 Dec 2017 08:45:52 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 0478E209F0; Fri, 1 Dec 2017 14:45:50 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 9CA1920986; Fri, 1 Dec 2017 14:45:39 +0100 (CET) From: Quentin Schulz To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, lee.jones@linaro.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thomas.petazzoni@free-electrons.com, linux-sunxi@googlegroups.com, Quentin Schulz Subject: [PATCH v4 05/10] pinctrl: axp209: add programmable gpio_status_offset Date: Fri, 1 Dec 2017 14:44:46 +0100 Message-Id: X-Mailer: git-send-email 2.14.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To prepare for patches that will add support for a new PMIC that has a different GPIO input status register, add a gpio_status_offset within axp20x_pctl structure and use it. Signed-off-by: Quentin Schulz Acked-by: Maxime Ripard Acked-by: Chen-Yu Tsai --- drivers/pinctrl/pinctrl-axp209.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- git-series 0.9.1 diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c index 6201d2b..3fae81f 100644 --- a/drivers/pinctrl/pinctrl-axp209.c +++ b/drivers/pinctrl/pinctrl-axp209.c @@ -48,6 +48,7 @@ struct axp20x_pctrl_desc { u8 ldo_mask; /* Stores the pins supporting ADC function. Bit offset is pin number. */ u8 adc_mask; + u8 gpio_status_offset; }; struct axp20x_pinctrl_function { @@ -77,6 +78,7 @@ static const struct axp20x_pctrl_desc axp20x_data = { .npins = ARRAY_SIZE(axp209_pins), .ldo_mask = BIT(0) | BIT(1), .adc_mask = BIT(0) | BIT(1), + .gpio_status_offset = 4, }; static int axp20x_gpio_get_reg(unsigned offset) @@ -108,7 +110,7 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset) if (ret) return ret; - return !!(val & BIT(offset + 4)); + return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); } static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)