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[54.225.227.206]) by mx.google.com with ESMTPS id e9si21001296qae.77.2014.09.16.17.29.30 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 16 Sep 2014 17:29:58 -0700 (PDT) Received-SPF: none (google.com: lng-odp-bounces@lists.linaro.org does not designate permitted sender hosts) client-ip=54.225.227.206; Received: from localhost ([127.0.0.1] helo=ip-10-35-177-41.ec2.internal) by ip-10-35-177-41.ec2.internal with esmtp (Exim 4.76) (envelope-from ) id 1XU37h-00088S-Mk; Wed, 17 Sep 2014 00:29:29 +0000 Received: from mail-bn1bon0055.outbound.protection.outlook.com ([157.56.111.55] helo=na01-bn1-obe.outbound.protection.outlook.com) by ip-10-35-177-41.ec2.internal with esmtp (Exim 4.76) (envelope-from ) id 1XU37b-00088N-Rf for lng-odp@lists.linaro.org; Wed, 17 Sep 2014 00:29:23 +0000 Received: from SN2PR07MB031.namprd07.prod.outlook.com (10.255.174.41) by SN2PR07MB031.namprd07.prod.outlook.com (10.255.174.41) with Microsoft SMTP Server (TLS) id 15.0.1024.12; Wed, 17 Sep 2014 00:29:17 +0000 Received: from SN2PR07MB031.namprd07.prod.outlook.com ([169.254.1.164]) by SN2PR07MB031.namprd07.prod.outlook.com ([169.254.1.148]) with mapi id 15.00.1024.012; Wed, 17 Sep 2014 00:29:17 +0000 From: "Rosenboim, Leonid" To: Bill Fischofer , Mike Holmes Thread-Topic: [lng-odp] [PATCH] odp_coremask.c: Use 1ULL for 64bit shifts Thread-Index: AQHP0gq23MLIbbGuwEqpTXUQOHoZpJwEdEwAgAAD7f8= Date: Wed, 17 Sep 2014 00:29:16 +0000 Message-ID: <1410913754021.77180@caviumnetworks.com> References: <1410912081-30912-1-git-send-email-mike.holmes@linaro.org>, In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [12.108.191.226] x-microsoft-antispam: BCL:0;PCL:0;RULEID:;UriScan:; x-forefront-prvs: 0337AFFE9A x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(199003)(189002)(24454002)(377454003)(36756003)(31966008)(19580405001)(99396002)(117636001)(2656002)(19580395003)(19617315012)(76176999)(95666004)(83322001)(77096002)(19625215002)(81342003)(107046002)(85806002)(99286002)(15202345003)(106116001)(21056001)(80022003)(74662003)(92726001)(87936001)(92566001)(54356999)(106356001)(105586002)(16236675004)(83072002)(50986999)(64706001)(97736003)(4396001)(46102003)(76482002)(79102003)(74502003)(85852003)(19627405001)(77982003)(20776003)(81542003)(85306004)(86362001)(66066001)(101416001)(15975445006)(90102001)(18265965002); DIR:OUT; SFP:1101; SCL:1; SRVR:SN2PR07MB031; H:SN2PR07MB031.namprd07.prod.outlook.com; FPR:; MLV:sfv; PTR:InfoNoRecords; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-OriginatorOrg: caviumnetworks.com X-Topics: patch Cc: "lng-odp@lists.linaro.org" Subject: Re: [lng-odp] [PATCH] odp_coremask.c: Use 1ULL for 64bit shifts X-BeenThere: lng-odp@lists.linaro.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: lng-odp-bounces@lists.linaro.org Sender: lng-odp-bounces@lists.linaro.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: Leonid.Rosenboim@caviumnetworks.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Content-Language: en-US ?"1 << core" will fail if core >= 32, hence "1ull << core" is needed. problem is, this will only work for core_id < 64, but that may not always be the case, e.g. if there are more than 64 cores, or if core number are not contiguous. diff --git a/platform/linux-generic/odp_coremask.c b/platform/linux-generic/odp_coremask.c index c55eb72..c7438cc 100644 --- a/platform/linux-generic/odp_coremask.c +++ b/platform/linux-generic/odp_coremask.c @@ -64,7 +64,7 @@ void odp_coremask_set(int core, odp_coremask_t *mask) return; } - mask->_u64[0] |= (1 << core); + mask->_u64[0] |= (1ULL << core); } void odp_coremask_clr(int core, odp_coremask_t *mask) @@ -77,7 +77,7 @@ void odp_coremask_clr(int core, odp_coremask_t *mask) return; } - mask->_u64[0] &= ~(1 << core); + mask->_u64[0] &= ~(1ULL << core); }