| Message ID | 1603948549-781-1-git-send-email-sundeep.lkml@gmail.com |
|---|---|
| Headers | show |
| Series | Support for OcteonTx2 98xx silcion | expand |
On Thu, 29 Oct 2020 10:45:39 +0530 sundeep.lkml@gmail.com wrote: > From: Subbaraya Sundeep <sbhatta@marvell.com> > > OcteonTx2 series of silicons have multiple variants, the > 98xx variant has two network interface controllers (NIX blocks) > each of which supports upto 100Gbps. Similarly 98xx supports > two crypto blocks (CPT) to double the crypto performance. > The current RVU drivers support a single NIX and > CPT blocks, this patchset adds support for multiple > blocks of same type to be active at the same time. > > Also the number of serdes controllers (CGX) have increased > from three to five on 98xx. Each of the CGX block supports > upto 4 physical interfaces depending on the serdes mode ie > upto 20 physical interfaces. At a time each CGX block can > be mapped to a single NIX. The HW configuration to map CGX > and NIX blocks is done by firmware. > > NPC has two new interfaces added NIX1_RX and NIX1_TX > similar to NIX0 interfaces. Also MCAM entries is increased > from 4k to 16k. To support the 16k entries extended set > is added in hardware which are at completely different > register offsets. Fortunately new constant registers > can be read to figure out the extended set is present > or not. Applied, thanks!
Thanks Jakub, Sundeep On Sun, Nov 1, 2020 at 3:35 AM Jakub Kicinski <kuba@kernel.org> wrote: > > On Thu, 29 Oct 2020 10:45:39 +0530 sundeep.lkml@gmail.com wrote: > > From: Subbaraya Sundeep <sbhatta@marvell.com> > > > > OcteonTx2 series of silicons have multiple variants, the > > 98xx variant has two network interface controllers (NIX blocks) > > each of which supports upto 100Gbps. Similarly 98xx supports > > two crypto blocks (CPT) to double the crypto performance. > > The current RVU drivers support a single NIX and > > CPT blocks, this patchset adds support for multiple > > blocks of same type to be active at the same time. > > > > Also the number of serdes controllers (CGX) have increased > > from three to five on 98xx. Each of the CGX block supports > > upto 4 physical interfaces depending on the serdes mode ie > > upto 20 physical interfaces. At a time each CGX block can > > be mapped to a single NIX. The HW configuration to map CGX > > and NIX blocks is done by firmware. > > > > NPC has two new interfaces added NIX1_RX and NIX1_TX > > similar to NIX0 interfaces. Also MCAM entries is increased > > from 4k to 16k. To support the 16k entries extended set > > is added in hardware which are at completely different > > register offsets. Fortunately new constant registers > > can be read to figure out the extended set is present > > or not. > > Applied, thanks!
From: Subbaraya Sundeep <sbhatta@marvell.com> OcteonTx2 series of silicons have multiple variants, the 98xx variant has two network interface controllers (NIX blocks) each of which supports upto 100Gbps. Similarly 98xx supports two crypto blocks (CPT) to double the crypto performance. The current RVU drivers support a single NIX and CPT blocks, this patchset adds support for multiple blocks of same type to be active at the same time. Also the number of serdes controllers (CGX) have increased from three to five on 98xx. Each of the CGX block supports upto 4 physical interfaces depending on the serdes mode ie upto 20 physical interfaces. At a time each CGX block can be mapped to a single NIX. The HW configuration to map CGX and NIX blocks is done by firmware. NPC has two new interfaces added NIX1_RX and NIX1_TX similar to NIX0 interfaces. Also MCAM entries is increased from 4k to 16k. To support the 16k entries extended set is added in hardware which are at completely different register offsets. Fortunately new constant registers can be read to figure out the extended set is present or not. This patch set modifies existing AF and PF drivers in below order to support 98xx: - Prepare for supporting multiple blocks of same type. Functions which operate with block type to get or set resources count are modified to operate with block address - Manage allocating and freeing LFs from new NIX1 and CPT1 RVU blocks. - NIX block specific initialization and teardown for NIX1 - Based on the mapping set by Firmware, assign the NIX block LFs to a PF/VF. - Multicast entries context is setup for NIX1 along with NIX0 - NPC changes to support extended set of MCAM entries, counters and NIX1 interfaces to NPC. - All the mailbox changes required for the new blocks in 98xx. - Since there are more CGX links in 98xx the hardcoded LBK link value needed by netdev drivers is not sufficient any more. Hence AF consumers need to get the number of all links and calculate the LBK link. - Debugfs changes to display NIX1 contexts similar to NIX0 - Debugfs change to display mapping between CGX, NIX and PF. v2: Resending since net-next is open now Rakesh Babu (4): octeontx2-af: Manage new blocks in 98xx octeontx2-af: Initialize NIX1 block octeontx2-af: Display NIX1 also in debugfs octeontx2-af: Display CGX, NIX and PF map in debugfs. Subbaraya Sundeep (6): octeontx2-af: Update get/set resource count functions octeontx2-af: Map NIX block from CGX connection octeontx2-af: Setup MCE context for assigned NIX octeontx2-af: Add NIX1 interfaces to NPC octeontx2-af: Mbox changes for 98xx octeontx2-pf: Calculate LBK link instead of hardcoding drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 13 +- drivers/net/ethernet/marvell/octeontx2/af/cgx.h | 5 + drivers/net/ethernet/marvell/octeontx2/af/common.h | 10 +- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 19 +- .../ethernet/marvell/octeontx2/af/npc_profile.h | 2 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.c | 361 ++++++++++++++++----- drivers/net/ethernet/marvell/octeontx2/af/rvu.h | 26 +- .../net/ethernet/marvell/octeontx2/af/rvu_cgx.c | 15 + .../ethernet/marvell/octeontx2/af/rvu_debugfs.c | 223 ++++++++++--- .../net/ethernet/marvell/octeontx2/af/rvu_nix.c | 199 +++++++++--- .../net/ethernet/marvell/octeontx2/af/rvu_npc.c | 328 ++++++++++++++----- .../net/ethernet/marvell/octeontx2/af/rvu_reg.c | 2 +- .../net/ethernet/marvell/octeontx2/af/rvu_reg.h | 87 ++++- .../net/ethernet/marvell/octeontx2/af/rvu_struct.h | 6 +- .../ethernet/marvell/octeontx2/nic/otx2_common.c | 8 +- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 2 + 16 files changed, 1008 insertions(+), 298 deletions(-)