From patchwork Wed Aug 8 12:38:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 143618 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp774486ljj; Wed, 8 Aug 2018 05:39:09 -0700 (PDT) X-Google-Smtp-Source: AA+uWPyGiGfcforMAtbGoeKRDz0oqq0rwz6CkQlHAi+8Z2KSqhhTahgWh4UZLkKzGEp6pDBhQvzv X-Received: by 2002:a62:89d8:: with SMTP id n85-v6mr2766020pfk.83.1533731949760; Wed, 08 Aug 2018 05:39:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533731949; cv=none; d=google.com; s=arc-20160816; b=cjvfsMPPivuJFQZWVWfmkYVYoBDz0ic0fSE9zKr1SfFo6O17ctkyLIrm0n2YwqRB9k QlYbbou1PskohYrIn3k+Ztbl6dUA9OS1LqQhUnLXsWiKczrFe9l8Km7yhlUkZ0SOa8q2 T2ViXs6QUdbat7oohRQfwRarcezGM4RpPDhZAvNZJy521ENV072j66DdIjzNxzMnN5ya kBJh62ZVcCVSXr7Bf7GS8DNTTYXBlD7vPZPVFNY6f3Fx4/hD7WPLCssFga2wWwaq6Fo3 f3H7NmZOq0KmNud+6Ekj9qkeVqKAiOdJqZvRegRK1T8s4B9S/dMsItS5OWgCkRrlrZ11 g4sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=1yiJNw/vp5Zdbz+Po9xugvhwcYIdor1brKuJiEsPOmI=; b=UPt80n3rXEn3pYjycJRYLdKf8ROyxW8tVlTaNDyGFfWomGhCw1nqoTGZOYZ5kGY6Bn T/eJQBo1wUHP8QfhXbJtoa1pbdCMJzZuA6OO/qlpGdOOH1JSmQEV+OeklRnz01zYKOs9 /DSBq1WXn7+vYcYRoARdsi44aeCxtTPlCFfMAJ0j9EroQQw0b8WV3RAogOELZ9yQxv8i xmUr4kJgW4b5EmD85xvrh6El75d75XE1yiH0KidHJ4cr2FisZ5AFqJmFHaC3Fsw7/EC0 mCDtgYXzS3xqeFLmI5i2MsVv7zjszDbgPuRklLnDQjhyPH7ZjQYKujZe2dQBPE0c7zJC DByw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OQmYNs8e; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k6-v6si4382166pgb.446.2018.08.08.05.39.09; Wed, 08 Aug 2018 05:39:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OQmYNs8e; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727035AbeHHO6i (ORCPT + 10 others); Wed, 8 Aug 2018 10:58:38 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:36601 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726756AbeHHO6i (ORCPT ); Wed, 8 Aug 2018 10:58:38 -0400 Received: by mail-lf1-f66.google.com with SMTP id b22-v6so1476792lfa.3 for ; Wed, 08 Aug 2018 05:39:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=1yiJNw/vp5Zdbz+Po9xugvhwcYIdor1brKuJiEsPOmI=; b=OQmYNs8ekDTEeCuO2B7oY0HCncBHehl174myym2idu/cbGDzxe5ovozfQwNDftPmpc 1j0vLFpsviDEcSlTi/nJT3+f3V6SAJYyphkKjJd3rRCbXA4yrEZgye8dMcIfaERht3oC KC5VVvWdb+ESCdLrSiVNyHoHEC1qF/hgEZqnw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=1yiJNw/vp5Zdbz+Po9xugvhwcYIdor1brKuJiEsPOmI=; b=UcoQ/c1O+7facE+IGoHzgjY29nt6RaGzUUqAZegl7saEORaOGKzn3pP9KSElr444LS CT/cPM+1bNXa7qbGhEnWGJQmXlzfhHwKSPHFOD8D/zzNfdfJ+FZ5jDPQUjHbhwgz6jHM 77gjJuzuI9iFPQzQEIUxjFMuo1bAjznm2ZgiSf4ln7ih0teWqde+KK50B4LEbP0afwXw VpJbpDvgOYNAXxGAIM3lWrWzWYQcNiefDKoZQghHXd/5lsDHCPZ/IHwOR1uSTUpUPV0P AQbpo4WD5FNJmagGiqcH7pJWUhbhVtpg1vef0WZ4YVX1dA4xUsaeijH/USHeVcKWrEzi LmpQ== X-Gm-Message-State: AOUpUlGSLxWWywh0BQpPjP7mBeJNXiTsF5FdDXNv9/6AJwWxFbqdaGiw jBMeyGpjSpR53t3Cw3CcVP6ubw== X-Received: by 2002:a19:d204:: with SMTP id j4-v6mr1807149lfg.139.1533731945720; Wed, 08 Aug 2018 05:39:05 -0700 (PDT) Received: from localhost.bredbandsbolaget (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id n6-v6sm796071lfi.24.2018.08.08.05.39.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 08 Aug 2018 05:39:04 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, openwrt-devel@lists.openwrt.org, LEDE Development List , Linus Walleij Subject: [PATCH] net: dsa: rtl8366rb: Support port 4 (WAN) Date: Wed, 8 Aug 2018 14:38:55 +0200 Message-Id: <20180808123855.18729-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The totally undocumented IO mode needs to be set to enumerator 0 to enable port 4 also known as WAN in most configurations, for ordinary traffic. The 3 bits in the register come up as 010 after reset, but need to be set to 000. The Realtek source code contains a name for these bits, but no explanation of what the 8 different IO modes may be. Set it to zero for the time being and drop a comment so people know what is going on if they run into trouble. This "mode zero" works fine with the D-Link DIR-685 with RTL8366RB. Signed-off-by: Linus Walleij --- drivers/net/dsa/rtl8366rb.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.17.1 Reviewed-by: Andrew Lunn diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index 1e55b9bf8b56..a4d5049df692 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -48,6 +48,23 @@ #define RTL8366RB_SSCR2 0x0004 #define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0) +/* Port Mode Control registers */ +#define RTL8366RB_PMC0 0x0005 +#define RTL8366RB_PMC0_SPI BIT(0) +#define RTL8366RB_PMC0_EN_AUTOLOAD BIT(1) +#define RTL8366RB_PMC0_PROBE BIT(2) +#define RTL8366RB_PMC0_DIS_BISR BIT(3) +#define RTL8366RB_PMC0_ADCTEST BIT(4) +#define RTL8366RB_PMC0_SRAM_DIAG BIT(5) +#define RTL8366RB_PMC0_EN_SCAN BIT(6) +#define RTL8366RB_PMC0_P4_IOMODE_SHIFT 7 +#define RTL8366RB_PMC0_P4_IOMODE_MASK GENMASK(9, 7) +#define RTL8366RB_PMC0_P5_IOMODE_SHIFT 10 +#define RTL8366RB_PMC0_P5_IOMODE_MASK GENMASK(12, 10) +#define RTL8366RB_PMC0_SDSMODE_SHIFT 13 +#define RTL8366RB_PMC0_SDSMODE_MASK GENMASK(15, 13) +#define RTL8366RB_PMC1 0x0006 + /* Port Mirror Control Register */ #define RTL8366RB_PMCR 0x0007 #define RTL8366RB_PMCR_SOURCE_PORT(a) (a) @@ -860,6 +877,19 @@ static int rtl8366rb_setup(struct dsa_switch *ds) if (ret) return ret; + /* Port 4 setup: this enables Port 4, usually the WAN port, + * common PHY IO mode is apparently mode 0, and this is not what + * the port is initialized to. There is no explanation of the + * IO modes in the Realtek source code, if your WAN port is + * connected to something exotic such as fiber, then this might + * be worth experimenting with. + */ + ret = regmap_update_bits(smi->map, RTL8366RB_PMC0, + RTL8366RB_PMC0_P4_IOMODE_MASK, + 0 << RTL8366RB_PMC0_P4_IOMODE_SHIFT); + if (ret) + return ret; + /* Discard VLAN tagged packets if the port is not a member of * the VLAN with which the packets is associated. */